1 V 46 ns 16 Mb SOI-DRAM with body control technique

Ken'ichi Shimomura; Hiroki Shimano; Fumihiro Okuda; Narumi Sakashita; Yasuo Yamaguchi; Toshiyuki Oashi; Takahisa Eimori; Masahide Inuishi; Kazutami Arimoto; Shigeto Maegawa; Yasuo Inoue; Tadashi Nishimura; Shinji Komori; Kazuo Kyuma; Akihiko Yasuoka; Haruhiko Abe

1 V 46 ns 16 Mb SOI-DRAM with body control technique

Ken'ichi Shimomura^*, Hiroki Shimano, Fumihiro Okuda, Narumi Sakashita, Yasuo Yamaguchi, Toshiyuki Oashi, Takahisa Eimori, Masahide Inuishi, Kazutami Arimoto, Shigeto Maegawa, Yasuo Inoue, Tadashi Nishimura, Shinji Komori, Kazuo Kyuma, Akihiko Yasuoka, Haruhiko Abe

^*Corresponding author for this work

Research output: Contribution to journal › Conference article › peer-review

4 Citations (Scopus)

Abstract

Silicon on insulator (SOI) technology is used to fabricate a dynamic random access memory (DRAM) capable of low voltage operation. The device uses a body-pulsed sense amplifier and a body-driven equalizer to accelerate low-voltage speed while partially-depleted and fully depleted transistors are used to enhance on-state current. The device's performance is evaluated experimentally.

Original language	English
Pages (from-to)	68-69
Number of pages	2
Journal	Digest of Technical Papers - IEEE International Solid-State Circuits Conference
Volume	40
Publication status	Published - 1997 Feb 1
Externally published	Yes
Event	Proceedings of the 1997 IEEE International Solid-State Circuits Conference, ISSCC - San Francisco, CA, USA Duration: 1997 Feb 6 → 1997 Feb 8

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

Cite this

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title = "1 V 46 ns 16 Mb SOI-DRAM with body control technique",

abstract = "Silicon on insulator (SOI) technology is used to fabricate a dynamic random access memory (DRAM) capable of low voltage operation. The device uses a body-pulsed sense amplifier and a body-driven equalizer to accelerate low-voltage speed while partially-depleted and fully depleted transistors are used to enhance on-state current. The device's performance is evaluated experimentally.",

author = "Ken'ichi Shimomura and Hiroki Shimano and Fumihiro Okuda and Narumi Sakashita and Yasuo Yamaguchi and Toshiyuki Oashi and Takahisa Eimori and Masahide Inuishi and Kazutami Arimoto and Shigeto Maegawa and Yasuo Inoue and Tadashi Nishimura and Shinji Komori and Kazuo Kyuma and Akihiko Yasuoka and Haruhiko Abe",

year = "1997",

month = feb,

day = "1",

language = "English",

volume = "40",

pages = "68--69",

journal = "Digest of Technical Papers - IEEE International Solid-State Circuits Conference",

issn = "0193-6530",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "Proceedings of the 1997 IEEE International Solid-State Circuits Conference, ISSCC ; Conference date: 06-02-1997 Through 08-02-1997",

}

TY - JOUR

T1 - 1 V 46 ns 16 Mb SOI-DRAM with body control technique

AU - Shimomura, Ken'ichi

AU - Shimano, Hiroki

AU - Okuda, Fumihiro

AU - Sakashita, Narumi

AU - Yamaguchi, Yasuo

AU - Oashi, Toshiyuki

AU - Eimori, Takahisa

AU - Inuishi, Masahide

AU - Arimoto, Kazutami

AU - Maegawa, Shigeto

AU - Inoue, Yasuo

AU - Nishimura, Tadashi

AU - Komori, Shinji

AU - Kyuma, Kazuo

AU - Yasuoka, Akihiko

AU - Abe, Haruhiko

PY - 1997/2/1

Y1 - 1997/2/1

N2 - Silicon on insulator (SOI) technology is used to fabricate a dynamic random access memory (DRAM) capable of low voltage operation. The device uses a body-pulsed sense amplifier and a body-driven equalizer to accelerate low-voltage speed while partially-depleted and fully depleted transistors are used to enhance on-state current. The device's performance is evaluated experimentally.

AB - Silicon on insulator (SOI) technology is used to fabricate a dynamic random access memory (DRAM) capable of low voltage operation. The device uses a body-pulsed sense amplifier and a body-driven equalizer to accelerate low-voltage speed while partially-depleted and fully depleted transistors are used to enhance on-state current. The device's performance is evaluated experimentally.

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M3 - Conference article

AN - SCOPUS:0031069028

SN - 0193-6530

VL - 40

SP - 68

EP - 69

JO - Digest of Technical Papers - IEEE International Solid-State Circuits Conference

JF - Digest of Technical Papers - IEEE International Solid-State Circuits Conference

T2 - Proceedings of the 1997 IEEE International Solid-State Circuits Conference, ISSCC

Y2 - 6 February 1997 through 8 February 1997

ER -

1 V 46 ns 16 Mb SOI-DRAM with body control technique

Abstract

ASJC Scopus subject areas

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