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1.047GHz, 1.2V, 90nm CMOS, 2-way VLIW DSP core using saturation anticipator circuit
H. Suzuki*, H. Takata, H. Shinohara, E. Teraoka, M. Matsuo, T. Yoshida, H. Sato, N. Honda, N. Masui, T. Shimizu
*Corresponding author for this work
Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
2
Citations
(Scopus)