5.25 GHz linear CMOS power amplifier with a diode-connected NMOS bias circuit

Shihai He*, Yorikatsu Uchida, Xin Yang, Qing Liu, Toshihiko Yoshimasu

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

In this paper, a 5.25GHz linear CMOS power amplifier (PA) with an integrated diode is presented. The proposed technique improves the linearity of the power amplifier by a diode-connected NMOS transistor. The NMOS diode is effective to suppress both the AM-AM distortion and AM-PM distortion. To verify this concept, the power amplifier is simulated with TSMC 0.13-μm CMOS process. With a power supply of 3.3 V, the proposed power amplifier exhibits a maximum IMD improvement of 25 dB with a PAE of 38.2 % at an output P1dB of 19.6 dBm.

Original languageEnglish
Title of host publication2012 International Conference on Microwave and Millimeter Wave Technology, ICMMT 2012 - Proceedings
Pages1912-1915
Number of pages4
DOIs
Publication statusPublished - 2012
Event2012 International Conference on Microwave and Millimeter Wave Technology, ICMMT 2012 - Shenzhen, China
Duration: 2012 May 52012 May 8

Publication series

Name2012 International Conference on Microwave and Millimeter Wave Technology, ICMMT 2012 - Proceedings
Volume5

Conference

Conference2012 International Conference on Microwave and Millimeter Wave Technology, ICMMT 2012
Country/TerritoryChina
CityShenzhen
Period12/5/512/5/8

Keywords

  • CMOS power amplifier
  • Integrated Diode
  • adaptive bias
  • intermodulation distortion

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Fingerprint

Dive into the research topics of '5.25 GHz linear CMOS power amplifier with a diode-connected NMOS bias circuit'. Together they form a unique fingerprint.

Cite this