A 100MHz dual port (DP) MRAM with swing-less bit-line sensing (SLBS) operation for high-end microcomputer systems

Hu Li; Leona Okamura; Tsutomu Yoshihara; Tsukasa Ooishi; Yuji Kihara

doi:10.1109/ISCIT.2006.339888

A 100MHz dual port (DP) MRAM with swing-less bit-line sensing (SLBS) operation for high-end microcomputer systems

Hu Li^*, Leona Okamura, Tsutomu Yoshihara, Tsukasa Ooishi, Yuji Kihara

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

In this paper, we propose two kinds of implementations of the dual port MRAM, one of which is for the read/write concurrent operation while another is for the additional simultaneous read operation. Compared with dual port SRAM, the dual port MRAM accompanied with smaller memory cell size will make high performance systems realized in the mobile/robotics field. A swing-less bit-line sensing (SLBS) technique and the static bitline level in the read mode, help to realize the high performance under the condition of Vcc=1.0V and the operation frequency of 100MHz.

Original language	English
Title of host publication	2006 International Symposium on Communications and Information Technologies, ISCIT
Pages	63-66
Number of pages	4
DOIs	https://doi.org/10.1109/ISCIT.2006.339888
Publication status	Published - 2006
Event	2006 International Symposium on Communications and Information Technologies, ISCIT - Bangkok Duration: 2006 Oct 18 → 2006 Oct 20

Other

Other	2006 International Symposium on Communications and Information Technologies, ISCIT
City	Bangkok
Period	06/10/18 → 06/10/20

ASJC Scopus subject areas

Computer Networks and Communications
Hardware and Architecture
Electrical and Electronic Engineering

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10.1109/ISCIT.2006.339888

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Li, H, Okamura, L, Yoshihara, T, Ooishi, T & Kihara, Y 2006, A 100MHz dual port (DP) MRAM with swing-less bit-line sensing (SLBS) operation for high-end microcomputer systems. in 2006 International Symposium on Communications and Information Technologies, ISCIT., 4141514, pp. 63-66, 2006 International Symposium on Communications and Information Technologies, ISCIT, Bangkok, 06/10/18. https://doi.org/10.1109/ISCIT.2006.339888

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abstract = "In this paper, we propose two kinds of implementations of the dual port MRAM, one of which is for the read/write concurrent operation while another is for the additional simultaneous read operation. Compared with dual port SRAM, the dual port MRAM accompanied with smaller memory cell size will make high performance systems realized in the mobile/robotics field. A swing-less bit-line sensing (SLBS) technique and the static bitline level in the read mode, help to realize the high performance under the condition of Vcc=1.0V and the operation frequency of 100MHz.",

author = "Hu Li and Leona Okamura and Tsutomu Yoshihara and Tsukasa Ooishi and Yuji Kihara",

year = "2006",

doi = "10.1109/ISCIT.2006.339888",

language = "English",

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note = "2006 International Symposium on Communications and Information Technologies, ISCIT ; Conference date: 18-10-2006 Through 20-10-2006",

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AU - Kihara, Yuji

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AB - In this paper, we propose two kinds of implementations of the dual port MRAM, one of which is for the read/write concurrent operation while another is for the additional simultaneous read operation. Compared with dual port SRAM, the dual port MRAM accompanied with smaller memory cell size will make high performance systems realized in the mobile/robotics field. A swing-less bit-line sensing (SLBS) technique and the static bitline level in the read mode, help to realize the high performance under the condition of Vcc=1.0V and the operation frequency of 100MHz.

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BT - 2006 International Symposium on Communications and Information Technologies, ISCIT

T2 - 2006 International Symposium on Communications and Information Technologies, ISCIT

Y2 - 18 October 2006 through 20 October 2006

ER -

A 100MHz dual port (DP) MRAM with swing-less bit-line sensing (SLBS) operation for high-end microcomputer systems

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