A 16M SRAM with improved characteristics using DRAM technology

Yuji Kihara; Yasushi Nakashima; Takashi Izutsu; Masayuki Nakamoto; Yasuhiro Konishi; Tsutomu Yoshihara

doi:10.1109/ASSCC.2005.251778

A 16M SRAM with improved characteristics using DRAM technology

Yuji Kihara^*, Yasushi Nakashima, Takashi Izutsu, Masayuki Nakamoto, Yasuhiro Konishi, Tsutomu Yoshihara

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

5 Citations (Scopus)

Abstract

A 16Mbit Low Power SRAM with 0.98um² cells using 0.15um DRAM and TFT technology has been developed. A new type memory cell technology achieves enough low power, low cost and high soft error immunity without large investment. By these improved characteristics some customers at industrial machines and handy devices decided to use this new type of SRAM by compatibility with SRAM.

Original language	English
Title of host publication	2005 IEEE Asian Solid-State Circuits Conference, ASSCC 2005
Pages	17-20
Number of pages	4
DOIs	https://doi.org/10.1109/ASSCC.2005.251778
Publication status	Published - 2006
Event	1st IEEE Asian Solid-State Circuits Conference, ASSCC 2005 - Hsinchu Duration: 2005 Nov 1 → 2005 Nov 3

Other

Other	1st IEEE Asian Solid-State Circuits Conference, ASSCC 2005
City	Hsinchu
Period	05/11/1 → 05/11/3

ASJC Scopus subject areas

Electrical and Electronic Engineering
Electronic, Optical and Magnetic Materials

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10.1109/ASSCC.2005.251778

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title = "A 16M SRAM with improved characteristics using DRAM technology",

abstract = "A 16Mbit Low Power SRAM with 0.98um2 cells using 0.15um DRAM and TFT technology has been developed. A new type memory cell technology achieves enough low power, low cost and high soft error immunity without large investment. By these improved characteristics some customers at industrial machines and handy devices decided to use this new type of SRAM by compatibility with SRAM.",

author = "Yuji Kihara and Yasushi Nakashima and Takashi Izutsu and Masayuki Nakamoto and Yasuhiro Konishi and Tsutomu Yoshihara",

year = "2006",

doi = "10.1109/ASSCC.2005.251778",

language = "English",

isbn = "0780391624",

pages = "17--20",

booktitle = "2005 IEEE Asian Solid-State Circuits Conference, ASSCC 2005",

note = "1st IEEE Asian Solid-State Circuits Conference, ASSCC 2005 ; Conference date: 01-11-2005 Through 03-11-2005",

}

TY - GEN

T1 - A 16M SRAM with improved characteristics using DRAM technology

AU - Kihara, Yuji

AU - Nakashima, Yasushi

AU - Izutsu, Takashi

AU - Nakamoto, Masayuki

AU - Konishi, Yasuhiro

AU - Yoshihara, Tsutomu

PY - 2006

Y1 - 2006

N2 - A 16Mbit Low Power SRAM with 0.98um2 cells using 0.15um DRAM and TFT technology has been developed. A new type memory cell technology achieves enough low power, low cost and high soft error immunity without large investment. By these improved characteristics some customers at industrial machines and handy devices decided to use this new type of SRAM by compatibility with SRAM.

AB - A 16Mbit Low Power SRAM with 0.98um2 cells using 0.15um DRAM and TFT technology has been developed. A new type memory cell technology achieves enough low power, low cost and high soft error immunity without large investment. By these improved characteristics some customers at industrial machines and handy devices decided to use this new type of SRAM by compatibility with SRAM.

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U2 - 10.1109/ASSCC.2005.251778

DO - 10.1109/ASSCC.2005.251778

M3 - Conference contribution

AN - SCOPUS:34250692026

SN - 0780391624

SN - 9780780391628

SP - 17

EP - 20

BT - 2005 IEEE Asian Solid-State Circuits Conference, ASSCC 2005

T2 - 1st IEEE Asian Solid-State Circuits Conference, ASSCC 2005

Y2 - 1 November 2005 through 3 November 2005

ER -

A 16M SRAM with improved characteristics using DRAM technology

Abstract

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