A 28-GHz-Band Efficient Linear Power Amplifier with Novel Adaptive Bias Circuit for 5G Mobile Communications in 56-nm CMOS SOI

Mengchu Fang, Tsuyoshi Sugiura, Toshihiko Yoshimasu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper presents a 28-GHz-band high efficiency linear power amplifier in 56-nm CMOS SOI for 5G mobile communication systems. A novel adaptive bias circuit is proposed to attain high linearity and efficiency simultaneously. In addition, a source degeneration inductor is utilized to improve the gain linearity of the power amplifier. It is expected that the power amplifier exhibits a P1dB of 20 dBm with a linear power gain of 13.2 dB and a peak PAE of 41.4% at a supply voltage of 3.6 V.

Original languageEnglish
Title of host publication2020 IEEE MTT-S International Wireless Symposium, IWS 2020 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728167039
DOIs
Publication statusPublished - 2020 Sept 20
Event2020 IEEE MTT-S International Wireless Symposium, IWS 2020 - Virtual, Shanghai, China
Duration: 2020 Sept 202020 Sept 23

Publication series

Name2020 IEEE MTT-S International Wireless Symposium, IWS 2020 - Proceedings

Conference

Conference2020 IEEE MTT-S International Wireless Symposium, IWS 2020
Country/TerritoryChina
CityVirtual, Shanghai
Period20/9/2020/9/23

Keywords

  • CMOS SOI
  • adaptive bias
  • high efficiency
  • high linearity
  • power amplifier

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Signal Processing
  • Instrumentation

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