A 416-mW 32-Gbit/s 300-GHz CMOS receiver

Shinsuke Hara; Kosuke Katayama; Kyoya Takano; Ruibing Dong; Issei Watanabe; Norihiko Sekine; Akifumi Kasamatsu; Takeshi Yoshida; Shuhei Amakawa; Minoru Fujishima

doi:10.1109/RFIT.2017.8048291

A 416-mW 32-Gbit/s 300-GHz CMOS receiver

Shinsuke Hara, Kosuke Katayama, Kyoya Takano, Ruibing Dong, Issei Watanabe, Norihiko Sekine, Akifumi Kasamatsu, Takeshi Yoshida, Shuhei Amakawa, Minoru Fujishima

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

10 Citations (Scopus)

Abstract

This paper reports on a 300-GHz CMOS receiver with an LNA-less architecture that operates above NMOS unity-power-gain frequency, f_max. Both low power consumption and high conversion gain are achieved using a high-performance tripler-last multiplier combined with a downconversion mixer. Its conversion gain and 3-dB bandwidth are-18 dB and 33 GHz, respectively. The receiver achieves a wireless data rate of 32 Gb/s with 16QAM.

Original language	English
Title of host publication	2017 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2017
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	65-67
Number of pages	3
ISBN (Electronic)	9781509040360
DOIs	https://doi.org/10.1109/RFIT.2017.8048291
Publication status	Published - 2017 Sept 20
Externally published	Yes
Event	2017 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2017 - Seoul, Korea, Republic of Duration: 2017 Aug 30 → 2017 Sept 1

Publication series

Name	2017 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2017

Other

Other	2017 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2017
Country/Territory	Korea, Republic of
City	Seoul
Period	17/8/30 → 17/9/1

Keywords

Receiver
quadrature amplitude modulation
terahertz

ASJC Scopus subject areas

Computer Networks and Communications
Electrical and Electronic Engineering
Instrumentation

Access to Document

10.1109/RFIT.2017.8048291

Cite this

Hara, S., Katayama, K., Takano, K., Dong, R., Watanabe, I., Sekine, N., Kasamatsu, A., Yoshida, T., Amakawa, S., & Fujishima, M. (2017). A 416-mW 32-Gbit/s 300-GHz CMOS receiver. In 2017 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2017 (pp. 65-67). Article 8048291 (2017 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2017). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/RFIT.2017.8048291

A 416-mW 32-Gbit/s 300-GHz CMOS receiver. / Hara, Shinsuke; Katayama, Kosuke; Takano, Kyoya et al.
2017 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2017. Institute of Electrical and Electronics Engineers Inc., 2017. p. 65-67 8048291 (2017 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2017).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Hara, S, Katayama, K, Takano, K, Dong, R, Watanabe, I, Sekine, N, Kasamatsu, A, Yoshida, T, Amakawa, S & Fujishima, M 2017, A 416-mW 32-Gbit/s 300-GHz CMOS receiver. in 2017 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2017., 8048291, 2017 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2017, Institute of Electrical and Electronics Engineers Inc., pp. 65-67, 2017 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2017, Seoul, Korea, Republic of, 17/8/30. https://doi.org/10.1109/RFIT.2017.8048291

Hara S, Katayama K, Takano K, Dong R, Watanabe I, Sekine N et al. A 416-mW 32-Gbit/s 300-GHz CMOS receiver. In 2017 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2017. Institute of Electrical and Electronics Engineers Inc. 2017. p. 65-67. 8048291. (2017 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2017). doi: 10.1109/RFIT.2017.8048291

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abstract = "This paper reports on a 300-GHz CMOS receiver with an LNA-less architecture that operates above NMOS unity-power-gain frequency, fmax. Both low power consumption and high conversion gain are achieved using a high-performance tripler-last multiplier combined with a downconversion mixer. Its conversion gain and 3-dB bandwidth are-18 dB and 33 GHz, respectively. The receiver achieves a wireless data rate of 32 Gb/s with 16QAM.",

keywords = "Receiver, quadrature amplitude modulation, terahertz",

author = "Shinsuke Hara and Kosuke Katayama and Kyoya Takano and Ruibing Dong and Issei Watanabe and Norihiko Sekine and Akifumi Kasamatsu and Takeshi Yoshida and Shuhei Amakawa and Minoru Fujishima",

note = "Funding Information: V. ACKNOWLEDGMENT This work was supported by R&D on Wireless Transceiver Systems with CMOS Technology in 300GHz Band, as part of an R&D program for Key Technology in Terahertz Frequency Bands. Publisher Copyright: {\textcopyright} 2017 IEEE.; 2017 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2017 ; Conference date: 30-08-2017 Through 01-09-2017",

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AU - Sekine, Norihiko

AU - Kasamatsu, Akifumi

AU - Yoshida, Takeshi

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AU - Fujishima, Minoru

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AB - This paper reports on a 300-GHz CMOS receiver with an LNA-less architecture that operates above NMOS unity-power-gain frequency, fmax. Both low power consumption and high conversion gain are achieved using a high-performance tripler-last multiplier combined with a downconversion mixer. Its conversion gain and 3-dB bandwidth are-18 dB and 33 GHz, respectively. The receiver achieves a wireless data rate of 32 Gb/s with 16QAM.

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A 416-mW 32-Gbit/s 300-GHz CMOS receiver

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Keywords

ASJC Scopus subject areas

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