A 600MIPS 120mW 70μA leakage triple-CPU mobile application processor chip

S. Torii; S. Suzuki; H. Tomonaga; T. Tokue; J. Sakai; N. Suzuki; K. Murakami; T. Hiraga; K. Shigemoto; Y. Tatebe; E. Ohbuchi; N. Kayama; M. Edahiro; T. Kusano; N. Nishi

A 600MIPS 120mW 70μA leakage triple-CPU mobile application processor chip

S. Torii^*, S. Suzuki, H. Tomonaga, T. Tokue, J. Sakai, N. Suzuki, K. Murakami, T. Hiraga, K. Shigemoto, Y. Tatebe, E. Ohbuchi, N. Kayama, M. Edahiro, T. Kusano, N. Nishi

^*Corresponding author for this work

Research output: Contribution to journal › Conference article › peer-review

Abstract

A triple-CPU mobile application processor is developed on an 8.95mm×8.95mm die in a 0.1μm CMOS process. The IC integrates 3×ARM926 cores, a DSP, several accelerators, as well as strong bus and memory interfaces. It consumes 120mW for digital TV, web browser, and 3D graphics, and 250mW@200MHz for 600MIPS with full processing.

Original language	English
Article number	7.5
Pages (from-to)	102-103+553
Journal	Digest of Technical Papers - IEEE International Solid-State Circuits Conference
Volume	48
Publication status	Published - 2005
Externally published	Yes
Event	2005 IEEE International Solid-State Circuits Conference, ISSCC - San Francisco, CA, United States Duration: 2005 Feb 6 → 2005 Feb 10

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

Cite this

Torii, S., Suzuki, S., Tomonaga, H., Tokue, T., Sakai, J., Suzuki, N., Murakami, K., Hiraga, T., Shigemoto, K., Tatebe, Y., Ohbuchi, E., Kayama, N., Edahiro, M., Kusano, T., & Nishi, N. (2005). A 600MIPS 120mW 70μA leakage triple-CPU mobile application processor chip. Digest of Technical Papers - IEEE International Solid-State Circuits Conference, 48, 102-103+553. [7.5].

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abstract = "A triple-CPU mobile application processor is developed on an 8.95mm×8.95mm die in a 0.1μm CMOS process. The IC integrates 3×ARM926 cores, a DSP, several accelerators, as well as strong bus and memory interfaces. It consumes 120mW for digital TV, web browser, and 3D graphics, and 250mW@200MHz for 600MIPS with full processing.",

author = "S. Torii and S. Suzuki and H. Tomonaga and T. Tokue and J. Sakai and N. Suzuki and K. Murakami and T. Hiraga and K. Shigemoto and Y. Tatebe and E. Ohbuchi and N. Kayama and M. Edahiro and T. Kusano and N. Nishi",

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language = "English",

volume = "48",

pages = "102--103+553",

journal = "Digest of Technical Papers - IEEE International Solid-State Circuits Conference",

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note = "2005 IEEE International Solid-State Circuits Conference, ISSCC ; Conference date: 06-02-2005 Through 10-02-2005",

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T1 - A 600MIPS 120mW 70μA leakage triple-CPU mobile application processor chip

AU - Torii, S.

AU - Suzuki, S.

AU - Tomonaga, H.

AU - Tokue, T.

AU - Sakai, J.

AU - Suzuki, N.

AU - Murakami, K.

AU - Hiraga, T.

AU - Shigemoto, K.

AU - Tatebe, Y.

AU - Ohbuchi, E.

AU - Kayama, N.

AU - Edahiro, M.

AU - Kusano, T.

AU - Nishi, N.

PY - 2005

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N2 - A triple-CPU mobile application processor is developed on an 8.95mm×8.95mm die in a 0.1μm CMOS process. The IC integrates 3×ARM926 cores, a DSP, several accelerators, as well as strong bus and memory interfaces. It consumes 120mW for digital TV, web browser, and 3D graphics, and 250mW@200MHz for 600MIPS with full processing.

AB - A triple-CPU mobile application processor is developed on an 8.95mm×8.95mm die in a 0.1μm CMOS process. The IC integrates 3×ARM926 cores, a DSP, several accelerators, as well as strong bus and memory interfaces. It consumes 120mW for digital TV, web browser, and 3D graphics, and 250mW@200MHz for 600MIPS with full processing.

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A 600MIPS 120mW 70μA leakage triple-CPU mobile application processor chip

Abstract

ASJC Scopus subject areas

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