Abstract
Motion compensation is widely used in many video coding standards. Due to its bandwidth requirement and complexity, motion compensation is one of the most challenging parts in the design of high definition video decoder. In this paper, we propose a high performance and low bandwidth motion compensation design, which supports H.264/AVC, MPEG-1/2 and Chinese AVS standards. We introduce a 2-Dimensional cache that can greatly reduce the external bandwidth requirement. Similarities among the 3 standards are also explored to reduce hardware cost. We also propose a block-pipelining strategy to conceal the long latency of external memory access. Experimental results show that our motion compensation design can reduce the bandwidth by 74% in average and it can real-time decode 1920x1088@30 fps video stream at 80 MHz.
Original language | English |
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Pages (from-to) | 253-260 |
Number of pages | 8 |
Journal | IEICE Transactions on Electronics |
Volume | E93-C |
Issue number | 3 |
DOIs | |
Publication status | Published - 2010 |
Externally published | Yes |
Keywords
- 2-D cache
- High performance
- Low bandwidth
- Motion compensation
- Multi-standard
ASJC Scopus subject areas
- Electrical and Electronic Engineering
- Electronic, Optical and Magnetic Materials