A low-memory intensive decoding architecture for double-binary convolutional turbo code

Ming Zhan*, Liang Zhou, Jun Wu

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

1 Citation (Scopus)


Memory accesses take a large part of the power consumption in the iterative decoding of double-binary convolutional turbo code (DB-CTC). To deal with this, a low-memory intensive decoding architecture is proposed for DB-CTC in this paper. The new scheme is based on an improved maximum a posteriori probability algorithm, where instead of storing all of the state metrics, only a part of these state metrics is stored in the state metrics cache (SMC), and the memory size of the SMC is thus reduced by 25%. Owing to a compare-select-recalculate processing (CSRP) module in the proposed decoding architecture, the unstored state metrics are recalculated by simple operations, while maintaining near optimal decoding performance.

Original languageEnglish
Pages (from-to)202-213
Number of pages12
JournalTurkish Journal of Electrical Engineering and Computer Sciences
Issue number1
Publication statusPublished - 2014


  • Branch metrics
  • Computational complexity
  • MAP algorithm
  • State metrics cache

ASJC Scopus subject areas

  • Computer Science(all)
  • Electrical and Electronic Engineering


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