A new type of SRAM using DRAM technology

Yuji Kihara*, Leona Okamura, Yasushi Nakashima, Takashi Izutsu, Masayuki Nakamoto, Tsutomu Yoshihara

*Corresponding author for this work

    Research output: Contribution to journalArticlepeer-review


    16-Mbit low-power SRAM (SuperSRAM) was developed using a new memory cell technology which makes use of DRAM technology and TFT technology, which has a record of actual performance in SRAM. For SRAM, the problems of soft errors and operation at the lower limits of Vcc have manifested at the increasing levels of miniaturization, and increases in capacity have become increasingly difficult. Nonetheless, complete compatibility with asynchronous SRAM has been implemented with the free use of circuit technology, while various problems have been resolved without cost increases using DRAM memory cell technology, which reduces surface area. The characteristics of such devices are discussed predominantly from the perspective of design.

    Original languageEnglish
    Pages (from-to)32-41
    Number of pages10
    JournalElectronics and Communications in Japan, Part II: Electronics (English translation of Denshi Tsushin Gakkai Ronbunshi)
    Issue number9
    Publication statusPublished - 2007 Sept


    • Low-voltage operation
    • Small-area SRAM memory cells
    • Soft error-free
    • SRAM
    • SuperSRAM

    ASJC Scopus subject areas

    • Electrical and Electronic Engineering


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