A parallel algorithm for constructing binary decision diagrams

Shinji Kimura*, Edmund M. Clarke

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

47 Citations (Scopus)

Abstract

A parallel algorithm for constructing binary decision diagrams is described. The algorithms treats binary decision graphs as minimal finite automata. The automation for a Boolean fucntion with AND as its main operation (OR operation) is obtained by forming the intersection (union) of the regular sets associated with its operands. The union and intersection operations are implemented by a product construction on the minimal automata for the regular sets. After each product construction step the automaton must be reminimized. The parallel algorithm is designed so that it is possible to find the minimal representations for several Boolean operations in parallel. The level of each operation is determined. Operations at the same level can be performed in parallel without any communication between processors. If there are relatively few operations in one level, then the product generation step is divided into several suboperations and the results are merged.

Original languageEnglish
Title of host publicationProceedings - IEEE International Conference on Computer Design
Subtitle of host publicationVLSI in Computers and Processors
PublisherPubl by IEEE
Pages220-223
Number of pages4
ISBN (Print)O81862079X
Publication statusPublished - 1990 Sept 1
Externally publishedYes
EventProceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors - ICCD '90 - Cambridge, MA, USA
Duration: 1990 Sept 171990 Sept 19

Publication series

NameProceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Other

OtherProceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors - ICCD '90
CityCambridge, MA, USA
Period90/9/1790/9/19

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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