A parallel routing method for fixed pins using virtual boundary

Ran Zhang, Takahiro Watanabe

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

In recent PCB systems, the routing for high speed board is still achieved manually. As IC technology advances rapidly, the dimensions of packages and PCBs are decreasing while the pin counts and routing layers keep increasing. In this research, a parallel routing method for fixed pins using virtual boundary is proposed, which partitions the routing area into several sub-areas and routes them separately. Applying this proposed method, the wire length can be reduced. Moreover, considering the length-matching constraints, especially for the isometric wires routing problems, the proposed method can get better wire shape resemblance.

Original languageEnglish
Title of host publicationIEEE 2013 Tencon - Spring, TENCONSpring 2013 - Conference Proceedings
Pages99-103
Number of pages5
DOIs
Publication statusPublished - 2013 Sept 16
Event2013 1st IEEE TENCON Spring Conference, TENCONSpring 2013 - Sydney, NSW, Australia
Duration: 2013 Apr 172013 Apr 19

Publication series

NameIEEE 2013 Tencon - Spring, TENCONSpring 2013 - Conference Proceedings

Conference

Conference2013 1st IEEE TENCON Spring Conference, TENCONSpring 2013
Country/TerritoryAustralia
CitySydney, NSW
Period13/4/1713/4/19

Keywords

  • PCB routing
  • parallel wires
  • virtual boundary

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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