A power-gated MPU with 3-microsecond entry/exit delay using MTJ-based nonvolatile flip-flop

H. Koike, T. Ohsawa, S. Ikeda, T. Hanyu, H. Ohno, T. Endoh, N. Sakimura, R. Nebashi, Y. Tsuji, A. Morioka, S. Miura, H. Honjo, T. Sugibayashi

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

22 Citations (Scopus)

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Engineering & Materials Science