A retargeting methodology of nano-watt CMOS reference circuit based on advanced compact MOSFET model

Gong Chen*, Bo Yang, Shigetoshi Nakatake, Zhangcai Huang, Yasuaki Inoue

*Corresponding author for this work

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Abstract

    In retargeting of a nano-watt CMOS reference circuit, we adopt an advanced compact MOSFET model to describe the drain current consistently in strong and weak inversion levels. Based on this model, we describe all bias conditions in terms of ratios of the channel widths and lengths. Taking the effect of very long channels into account, we formulate the threshold voltage as a function of the drain-source voltage. Furthermore, we introduce a tuning parameter with the empirical range and fix all transistor sizes sweeping this parameter as well as applying a simulation. In case studies, we retargeted a circuit from the 180nm/1.8V process to the 90nm/1.2V, 2.5V, 3.3V processes. Besides, we fabricated the circuit in the 90nm/1.2V process, and confirmed the good measurement results such as less than 12.8%/V supply voltage variation and only 1.1nW power consumption.

    Original languageEnglish
    Title of host publicationISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems
    Pages938-941
    Number of pages4
    DOIs
    Publication statusPublished - 2012
    Event2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012 - Seoul
    Duration: 2012 May 202012 May 23

    Other

    Other2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012
    CitySeoul
    Period12/5/2012/5/23

    ASJC Scopus subject areas

    • Hardware and Architecture
    • Electrical and Electronic Engineering

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