TY - JOUR
T1 - A robust seamless communication architecture for next-generation mobile terminals on multi-CPU SoCs
AU - Inoue, Hiroaki
AU - Sakai, Junji
AU - Edahiro, Masato
PY - 2010/2/1
Y1 - 2010/2/1
N2 - We propose a robust seamless communication architecture that enables legacy mobile terminal software designed for single-CPU processors to be run on multi-CPU processors without any software modifications. This architecture features two new technologies: proxy processes, which help achieve the design of its user-level system-call hooking and a robust design method, which reduces bandwidth variation by systematic parameter optimization. Our evaluations confirmed that this architecture achieves fundamental features with satisfactory performance, that we have succeeded in getting actual mobile terminal software to run on three CPUs without modifying the software, and that the robust design method reduces bandwidth variation by 21%.
AB - We propose a robust seamless communication architecture that enables legacy mobile terminal software designed for single-CPU processors to be run on multi-CPU processors without any software modifications. This architecture features two new technologies: proxy processes, which help achieve the design of its user-level system-call hooking and a robust design method, which reduces bandwidth variation by systematic parameter optimization. Our evaluations confirmed that this architecture achieves fundamental features with satisfactory performance, that we have succeeded in getting actual mobile terminal software to run on three CPUs without modifying the software, and that the robust design method reduces bandwidth variation by 21%.
KW - Interprocess communication
KW - Linux
KW - Multi-CPU
KW - Taguchi Method
UR - http://www.scopus.com/inward/record.url?scp=77949474191&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=77949474191&partnerID=8YFLogxK
U2 - 10.1145/1698772.1698777
DO - 10.1145/1698772.1698777
M3 - Article
AN - SCOPUS:77949474191
SN - 1539-9087
VL - 9
JO - Transactions on Embedded Computing Systems
JF - Transactions on Embedded Computing Systems
IS - 3
M1 - 19
ER -