A robust SOI SRAM architecture by using advanced ABC technology for 32nm node and beyond LSTP devices

Yuuichi Hirano; Mikio Tsujiuchi; Kozo Ishikawa; Hirofumi Shinohara; Takashi Terada; Yukio Maki; Toshiaki Iwamatsu; Katsumi Eikyu; Tetsuya Uchida; Shigeki Obayashi; Koji Nii; Yasumasa Tsukamoto; Makoto Yabuuchi; Takashi Ipposhi; Hidekazu Oda; Yasuo Inoue

doi:10.1109/VLSIT.2007.4339734

A robust SOI SRAM architecture by using advanced ABC technology for 32nm node and beyond LSTP devices

Yuuichi Hirano^*, Mikio Tsujiuchi, Kozo Ishikawa, Hirofumi Shinohara, Takashi Terada, Yukio Maki, Toshiaki Iwamatsu, Katsumi Eikyu, Tetsuya Uchida, Shigeki Obayashi, Koji Nii, Yasumasa Tsukamoto, Makoto Yabuuchi, Takashi Ipposhi, Hidekazu Oda, Yasuo Inoue

^*Corresponding author for this work

Research output: Contribution to journal › Conference article › peer-review

8 Citations (Scopus)

Abstract

This paper presents that Advanced Actively Body-bias Controlled (Advanced ABC) technology contributes to enhancing operation margins of SRAMs. Significant enhancement of Static Noise Margin (SNM) is successfully realized by using a body bias of load transistors while suppressing threshold-voltage variations for the first time. It is demonstrated that the write and read margins of 65nm-node SOI SRAMs are improved by the Advanced ABC technology. Furthermore, it is found that the SNM is enhanced by 27% for 32nm and 49% for 22nm node. It is summarized that this technology is one of countermeasures for emerging generations.

Original language	English
Article number	4339734
Pages (from-to)	78-79
Number of pages	2
Journal	Digest of Technical Papers - Symposium on VLSI Technology
DOIs	https://doi.org/10.1109/VLSIT.2007.4339734
Publication status	Published - 2007
Externally published	Yes
Event	2007 Symposium on VLSI Technology, VLSIT 2007 - Kyoto, Japan Duration: 2007 Jun 12 → 2007 Jun 14

ASJC Scopus subject areas

Electrical and Electronic Engineering

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10.1109/VLSIT.2007.4339734

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Hirano, Y., Tsujiuchi, M., Ishikawa, K., Shinohara, H., Terada, T., Maki, Y., Iwamatsu, T., Eikyu, K., Uchida, T., Obayashi, S., Nii, K., Tsukamoto, Y., Yabuuchi, M., Ipposhi, T., Oda, H., & Inoue, Y. (2007). A robust SOI SRAM architecture by using advanced ABC technology for 32nm node and beyond LSTP devices. Digest of Technical Papers - Symposium on VLSI Technology, 78-79. Article 4339734. https://doi.org/10.1109/VLSIT.2007.4339734

Hirano, Y, Tsujiuchi, M, Ishikawa, K, Shinohara, H, Terada, T, Maki, Y, Iwamatsu, T, Eikyu, K, Uchida, T, Obayashi, S, Nii, K, Tsukamoto, Y, Yabuuchi, M, Ipposhi, T, Oda, H & Inoue, Y 2007, 'A robust SOI SRAM architecture by using advanced ABC technology for 32nm node and beyond LSTP devices', Digest of Technical Papers - Symposium on VLSI Technology, pp. 78-79. https://doi.org/10.1109/VLSIT.2007.4339734

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title = "A robust SOI SRAM architecture by using advanced ABC technology for 32nm node and beyond LSTP devices",

abstract = "This paper presents that Advanced Actively Body-bias Controlled (Advanced ABC) technology contributes to enhancing operation margins of SRAMs. Significant enhancement of Static Noise Margin (SNM) is successfully realized by using a body bias of load transistors while suppressing threshold-voltage variations for the first time. It is demonstrated that the write and read margins of 65nm-node SOI SRAMs are improved by the Advanced ABC technology. Furthermore, it is found that the SNM is enhanced by 27% for 32nm and 49% for 22nm node. It is summarized that this technology is one of countermeasures for emerging generations.",

author = "Yuuichi Hirano and Mikio Tsujiuchi and Kozo Ishikawa and Hirofumi Shinohara and Takashi Terada and Yukio Maki and Toshiaki Iwamatsu and Katsumi Eikyu and Tetsuya Uchida and Shigeki Obayashi and Koji Nii and Yasumasa Tsukamoto and Makoto Yabuuchi and Takashi Ipposhi and Hidekazu Oda and Yasuo Inoue",

year = "2007",

doi = "10.1109/VLSIT.2007.4339734",

language = "English",

pages = "78--79",

journal = "Digest of Technical Papers - Symposium on VLSI Technology",

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note = "2007 Symposium on VLSI Technology, VLSIT 2007 ; Conference date: 12-06-2007 Through 14-06-2007",

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T1 - A robust SOI SRAM architecture by using advanced ABC technology for 32nm node and beyond LSTP devices

AU - Hirano, Yuuichi

AU - Tsujiuchi, Mikio

AU - Ishikawa, Kozo

AU - Shinohara, Hirofumi

AU - Terada, Takashi

AU - Maki, Yukio

AU - Iwamatsu, Toshiaki

AU - Eikyu, Katsumi

AU - Uchida, Tetsuya

AU - Obayashi, Shigeki

AU - Nii, Koji

AU - Tsukamoto, Yasumasa

AU - Yabuuchi, Makoto

AU - Ipposhi, Takashi

AU - Oda, Hidekazu

AU - Inoue, Yasuo

PY - 2007

Y1 - 2007

N2 - This paper presents that Advanced Actively Body-bias Controlled (Advanced ABC) technology contributes to enhancing operation margins of SRAMs. Significant enhancement of Static Noise Margin (SNM) is successfully realized by using a body bias of load transistors while suppressing threshold-voltage variations for the first time. It is demonstrated that the write and read margins of 65nm-node SOI SRAMs are improved by the Advanced ABC technology. Furthermore, it is found that the SNM is enhanced by 27% for 32nm and 49% for 22nm node. It is summarized that this technology is one of countermeasures for emerging generations.

AB - This paper presents that Advanced Actively Body-bias Controlled (Advanced ABC) technology contributes to enhancing operation margins of SRAMs. Significant enhancement of Static Noise Margin (SNM) is successfully realized by using a body bias of load transistors while suppressing threshold-voltage variations for the first time. It is demonstrated that the write and read margins of 65nm-node SOI SRAMs are improved by the Advanced ABC technology. Furthermore, it is found that the SNM is enhanced by 27% for 32nm and 49% for 22nm node. It is summarized that this technology is one of countermeasures for emerging generations.

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JO - Digest of Technical Papers - Symposium on VLSI Technology

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ER -

A robust SOI SRAM architecture by using advanced ABC technology for 32nm node and beyond LSTP devices

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