TY - JOUR
T1 - A two-transistor bootstrap type selective device for spin-transfer-torque magnetic tunnel junctions
AU - Ohsawa, Takashi
AU - Ikeda, Shoji
AU - Hanyu, Takahiro
AU - Ohno, Hideo
AU - Endoh, Tetsuo
PY - 2014/4
Y1 - 2014/4
N2 - Two-transistor bootstrap type selective device for spin-transfer-torque magnetic tunnel junctions (STT-MTJs) is proposed that is smaller than the conventional ones with equivalent performance. The power supply voltage dependence of the area for the two-NFET bootstrap type selective device that can switch MTJs within 10 ns is compared with those of the conventional single-NFET, single-PFET, and CMOS type selective devices with the same performance in 90nm technology node. It is found that the two-NFET bootstrap type selective device can be smaller than the conventional ones especially for the power supply voltage equal to or lower than 0.9V. The two-NFET bootstrap type selective device is shown to maintain scalability to 32nm node just like the CMOS one, while the conventional single-NFET and single-PFET selective devices fail to be scaled properly. This selective device can be applied to every high-performance MOS/MTJ hybrid circuit for increasing the integration density.
AB - Two-transistor bootstrap type selective device for spin-transfer-torque magnetic tunnel junctions (STT-MTJs) is proposed that is smaller than the conventional ones with equivalent performance. The power supply voltage dependence of the area for the two-NFET bootstrap type selective device that can switch MTJs within 10 ns is compared with those of the conventional single-NFET, single-PFET, and CMOS type selective devices with the same performance in 90nm technology node. It is found that the two-NFET bootstrap type selective device can be smaller than the conventional ones especially for the power supply voltage equal to or lower than 0.9V. The two-NFET bootstrap type selective device is shown to maintain scalability to 32nm node just like the CMOS one, while the conventional single-NFET and single-PFET selective devices fail to be scaled properly. This selective device can be applied to every high-performance MOS/MTJ hybrid circuit for increasing the integration density.
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U2 - 10.7567/JJAP.53.04ED03
DO - 10.7567/JJAP.53.04ED03
M3 - Article
AN - SCOPUS:84903300382
SN - 0021-4922
VL - 53
JO - Japanese journal of applied physics
JF - Japanese journal of applied physics
IS - 4 SPEC. ISSUE
M1 - 04ED03
ER -