A universal delay line circuit for variation resilient IC with self-calibrated time-to-digital converter

Shuai Shao, Youhua Shi, Wentao Dai, Jianyi Meng, Weiwei Shan*

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Fingerprint

Dive into the research topics of 'A universal delay line circuit for variation resilient IC with self-calibrated time-to-digital converter'. Together they form a unique fingerprint.

Engineering & Materials Science