Abstract
Architecture simulators play an important role in exploring frontiers in the early stages of the architecture design. However, the execution time of simulators increases with an increase the number of cores. The sampling simulation technique that was originally proposed to simulate single-core processors is a promising approach to reduce simulation time. Two main hurdles for multi/many-core are preparing sampling points and thread skewing at functional simulation time. This paper proposes a very simple and low-error sampling-based acceleration technique for multi/many-core simulators. For a parallelized application, an iteration of a large loop including a parallelizable program part, is defined as a sampling unit. We apply X-means method to a profile result of the collection of iterations derived from a real machine to form clusters of those iterations. Multiple iterations are exploited as sampling points from these clusters. We execute the simulation along the sampling points and calculate the number of total execution cycles. Results from a 16-core simulation show that our proposed simulation technique gives us a maximum of 443x speedup with a 0.52% error and 218x speedup with 1.50% error on an average.
Original language | English |
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Title of host publication | Proceedings - IEEE 10th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2016 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 177-184 |
Number of pages | 8 |
ISBN (Electronic) | 9781509035304 |
DOIs | |
Publication status | Published - 2016 Dec 5 |
Event | 10th IEEE International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2016 - Lyon, France Duration: 2016 Sept 21 → 2016 Sept 23 |
Other
Other | 10th IEEE International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2016 |
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Country/Territory | France |
City | Lyon |
Period | 16/9/21 → 16/9/23 |
Keywords
- Compiler
- Multi/Many-core
- Simulator
ASJC Scopus subject areas
- Computer Networks and Communications
- Hardware and Architecture