Advanced ion implantation and rapid thermal annealing technologies for highly reliable 0.25μm dual gate CMOS

S. Shimizu; T. Kuroi; Y. Kawasaki; T. Tsutsumi; H. Oda; M. Inuishi; H. Miyoshi

Advanced ion implantation and rapid thermal annealing technologies for highly reliable 0.25μm dual gate CMOS

S. Shimizu^*, T. Kuroi, Y. Kawasaki, T. Tsutsumi, H. Oda, M. Inuishi, H. Miyoshi

^*Corresponding author for this work

Research output: Contribution to journal › Conference article › peer-review

2 Citations (Scopus)

Abstract

Advanced ion implantation and rapid thermal annealing technologies are proposed to realize highly reliable 0.25μm salicided dual gate CMOS for high performance logic application. These technologies mainly consist of mixing the CoSi₂/Si interface using silicon implantation, CVD-Si₃N₄/CVD-SiO₂ sidewall spacer, nitrogen implantation in gate polysilicon and source/drain regions and rapid thermal annealing (RTA) for reduction of thermal budget.

Original language	English
Pages (from-to)	64-65
Number of pages	2
Journal	Digest of Technical Papers - Symposium on VLSI Technology
Publication status	Published - 1996
Externally published	Yes
Event	Proceedings of the 1996 Symposium on VLSI Technology - Honolulu, HI, USA Duration: 1996 Jun 11 → 1996 Jun 13

ASJC Scopus subject areas

Electrical and Electronic Engineering

Cite this

@article{252abee8f3e642f1be4644ff04a53b32,

title = "Advanced ion implantation and rapid thermal annealing technologies for highly reliable 0.25μm dual gate CMOS",

abstract = "Advanced ion implantation and rapid thermal annealing technologies are proposed to realize highly reliable 0.25μm salicided dual gate CMOS for high performance logic application. These technologies mainly consist of mixing the CoSi2/Si interface using silicon implantation, CVD-Si3N4/CVD-SiO2 sidewall spacer, nitrogen implantation in gate polysilicon and source/drain regions and rapid thermal annealing (RTA) for reduction of thermal budget.",

author = "S. Shimizu and T. Kuroi and Y. Kawasaki and T. Tsutsumi and H. Oda and M. Inuishi and H. Miyoshi",

year = "1996",

language = "English",

pages = "64--65",

journal = "Digest of Technical Papers - Symposium on VLSI Technology",

issn = "0743-1562",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "Proceedings of the 1996 Symposium on VLSI Technology ; Conference date: 11-06-1996 Through 13-06-1996",

}

TY - JOUR

T1 - Advanced ion implantation and rapid thermal annealing technologies for highly reliable 0.25μm dual gate CMOS

AU - Shimizu, S.

AU - Kuroi, T.

AU - Kawasaki, Y.

AU - Tsutsumi, T.

AU - Oda, H.

AU - Inuishi, M.

AU - Miyoshi, H.

PY - 1996

Y1 - 1996

N2 - Advanced ion implantation and rapid thermal annealing technologies are proposed to realize highly reliable 0.25μm salicided dual gate CMOS for high performance logic application. These technologies mainly consist of mixing the CoSi2/Si interface using silicon implantation, CVD-Si3N4/CVD-SiO2 sidewall spacer, nitrogen implantation in gate polysilicon and source/drain regions and rapid thermal annealing (RTA) for reduction of thermal budget.

AB - Advanced ion implantation and rapid thermal annealing technologies are proposed to realize highly reliable 0.25μm salicided dual gate CMOS for high performance logic application. These technologies mainly consist of mixing the CoSi2/Si interface using silicon implantation, CVD-Si3N4/CVD-SiO2 sidewall spacer, nitrogen implantation in gate polysilicon and source/drain regions and rapid thermal annealing (RTA) for reduction of thermal budget.

UR - http://www.scopus.com/inward/record.url?scp=0029723679&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0029723679&partnerID=8YFLogxK

M3 - Conference article

AN - SCOPUS:0029723679

SN - 0743-1562

SP - 64

EP - 65

JO - Digest of Technical Papers - Symposium on VLSI Technology

JF - Digest of Technical Papers - Symposium on VLSI Technology

T2 - Proceedings of the 1996 Symposium on VLSI Technology

Y2 - 11 June 1996 through 13 June 1996

ER -

Advanced ion implantation and rapid thermal annealing technologies for highly reliable 0.25μm dual gate CMOS

Abstract

ASJC Scopus subject areas

Other files and links

Fingerprint

Cite this