An efficient majority-logic based message-passing algorithm for non-binary LDPC decoding

Yichao Lu; Nanfan Qiu; Zhixiang Chen; Satoshi Goto

doi:10.1109/APCCAS.2012.6419076

An efficient majority-logic based message-passing algorithm for non-binary LDPC decoding

Yichao Lu^*, Nanfan Qiu, Zhixiang Chen, Satoshi Goto

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

10 Citations (Scopus)

Abstract

This paper presents a majority-logic based message-passing algorithm for decoding non-binary LDPC codes. Recently, many majority-logic decoding (MLGD) algorithms make huge efforts on reducing the computational complexity for decoding non-binary LDPC codes. Inspired by one step majority-logic decoding and q-ary sum-product algorithm, we devise a novel iterative double-reliability- based (IDRB) MLGD algorithm which carries out an efficient trade-off between decoding computational complexity and error performance. The proposed algorithm achieves a remarkable enhancement on error correct ability and yet requires only integer operations and finite field operations. Simulation results on two NB-LDPC codes show that we succeed in achieving significant coding gain compared with IHRB-and ISRB-MLGD with limited complexity increase.

Original language	English
Title of host publication	IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS
Pages	479-482
Number of pages	4
DOIs	https://doi.org/10.1109/APCCAS.2012.6419076
Publication status	Published - 2012
Event	2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012 - Kaohsiung Duration: 2012 Dec 2 → 2012 Dec 5

Other

Other	2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012
City	Kaohsiung
Period	12/12/2 → 12/12/5

ASJC Scopus subject areas

Electrical and Electronic Engineering

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10.1109/APCCAS.2012.6419076

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title = "An efficient majority-logic based message-passing algorithm for non-binary LDPC decoding",

abstract = "This paper presents a majority-logic based message-passing algorithm for decoding non-binary LDPC codes. Recently, many majority-logic decoding (MLGD) algorithms make huge efforts on reducing the computational complexity for decoding non-binary LDPC codes. Inspired by one step majority-logic decoding and q-ary sum-product algorithm, we devise a novel iterative double-reliability- based (IDRB) MLGD algorithm which carries out an efficient trade-off between decoding computational complexity and error performance. The proposed algorithm achieves a remarkable enhancement on error correct ability and yet requires only integer operations and finite field operations. Simulation results on two NB-LDPC codes show that we succeed in achieving significant coding gain compared with IHRB-and ISRB-MLGD with limited complexity increase.",

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doi = "10.1109/APCCAS.2012.6419076",

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note = "2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012 ; Conference date: 02-12-2012 Through 05-12-2012",

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AU - Lu, Yichao

AU - Qiu, Nanfan

AU - Chen, Zhixiang

AU - Goto, Satoshi

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Y1 - 2012

N2 - This paper presents a majority-logic based message-passing algorithm for decoding non-binary LDPC codes. Recently, many majority-logic decoding (MLGD) algorithms make huge efforts on reducing the computational complexity for decoding non-binary LDPC codes. Inspired by one step majority-logic decoding and q-ary sum-product algorithm, we devise a novel iterative double-reliability- based (IDRB) MLGD algorithm which carries out an efficient trade-off between decoding computational complexity and error performance. The proposed algorithm achieves a remarkable enhancement on error correct ability and yet requires only integer operations and finite field operations. Simulation results on two NB-LDPC codes show that we succeed in achieving significant coding gain compared with IHRB-and ISRB-MLGD with limited complexity increase.

AB - This paper presents a majority-logic based message-passing algorithm for decoding non-binary LDPC codes. Recently, many majority-logic decoding (MLGD) algorithms make huge efforts on reducing the computational complexity for decoding non-binary LDPC codes. Inspired by one step majority-logic decoding and q-ary sum-product algorithm, we devise a novel iterative double-reliability- based (IDRB) MLGD algorithm which carries out an efficient trade-off between decoding computational complexity and error performance. The proposed algorithm achieves a remarkable enhancement on error correct ability and yet requires only integer operations and finite field operations. Simulation results on two NB-LDPC codes show that we succeed in achieving significant coding gain compared with IHRB-and ISRB-MLGD with limited complexity increase.

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BT - IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS

T2 - 2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012

Y2 - 2 December 2012 through 5 December 2012

ER -

An efficient majority-logic based message-passing algorithm for non-binary LDPC decoding

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