An universal logic-circuit with flip flop circuit based on DG-CNTFET

Yasuyuki Miura, Hiroshi Ninomiya, Manabu Kobayashi, Shigeyoshi Watanabe

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

In this paper, we propose the method for embedding the latch and the flip flop (FF) circuit to the universal logic circuit of Double Gate Carbon NanoTube Field Effect Transistor (DG-CNTFET) proposed in the previous work. Previously, 2-inputs universal logic circuit by 8 DG-CNTFET was proposed. If the embedding of flip flop to them is possible, the reconfigurable circuit which includes a state such as flip flop can be realized. The result of our research shows that SR-latch and D-latch with 3-inputs/state can be embedded within 2-inputs universal logic circuit. Thus it is shown that a D-FF can be embedded to two 2-inputs universal logic circuit.

Original languageEnglish
Title of host publication2013 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing, PACRIM 2013
Pages148-152
Number of pages5
DOIs
Publication statusPublished - 2013
Externally publishedYes
Event14th IEEE Pacific Rim Conference on Communications, Computers, and Signal Processing, PACRIM 2013 - Vancouver, BC, Canada
Duration: 2013 Aug 272013 Aug 29

Publication series

NameIEEE Pacific RIM Conference on Communications, Computers, and Signal Processing - Proceedings

Other

Other14th IEEE Pacific Rim Conference on Communications, Computers, and Signal Processing, PACRIM 2013
Country/TerritoryCanada
CityVancouver, BC
Period13/8/2713/8/29

Keywords

  • Ambipolar device
  • Binary decision diagram
  • Double gate CNTFET
  • Reconfigarable logic design

ASJC Scopus subject areas

  • Signal Processing
  • Computer Networks and Communications

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