Abstract
Physics of autonomous refresh is presented, which explains the mechanism of a spontaneous recovery of degraded binary states of the floating-body cell (FBC). Input current to the floating body and output current from the body balance to generate an unstable stationary state that is accompanied by two stable stationary ones. The current anomaly of impact ionization is essential for the instability that brings about the bistability and is realized by positive feedback where impact ionization current input increases as the body voltage increases. Experiments with charge pumping current as output show that the autonomous refresh is possible on a single-cell basis. Necessary conditions for a high-density memory to be autonomously refreshed are derived and assessed for state-of-the-art FBCs. FBC is shown in simulation to become an SRAM cell when the autonomous refresh is applied, which uses gate direct tunneling current as output. This is an SRAM cell that is theoretically expected to have the simplest structure ever reported.
Original language | English |
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Pages (from-to) | 2302-2311 |
Number of pages | 10 |
Journal | IEEE Transactions on Electron Devices |
Volume | 56 |
Issue number | 10 |
DOIs | |
Publication status | Published - 2009 |
Externally published | Yes |
Keywords
- Autonomous refresh
- Capacitorless 1T-DRAM
- Charge pumping
- Data retention current
- Floating-body cell (FBC)
- Gate direct tunneling
- Impact ionization
- SRAM
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering