Bias-voltage-dependent subcircuit model for millimeter-wave CMOS circuit

Kosuke Katayama*, Mizuki Motoyoshi, Kyoya Takano, Ryuichi Fujimoto, Minoru Fujishima

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

8 Citations (Scopus)


In this paper, we propose a new method for the bias-dependent parameter extraction of a MOSFET, which covers DC to over 100 GHz. The DC MOSFET model provided by the chip foundry is assumed to be correct, and the core DC characteristics are designed to be asymptotically recovered at low frequencies. This is carried out by representing the corrections required at high frequencies using a bias-dependent Y matrix, assuming that a parasitic nonlinear two-port matrix (Y-wrapper) is connected in parallel with the core MOSFET. The Y-wrapper can also handle the nonreciprocity of the parasitic components, that is, the asymmetry of the Y matrix. The reliability of the Y-wrapper model is confirmed through the simulation and measurement of a one-stage common-source amplifier operating at several bias points. This paper will not discuss about non-linearity.

Original languageEnglish
Pages (from-to)1077-1085
Number of pages9
JournalIEICE Transactions on Electronics
Issue number6
Publication statusPublished - 2012 Jun
Externally publishedYes


  • MOSFET modeling
  • Millimeter wave
  • Parameter extraction

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering


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