TY - GEN
T1 - Clues for modeling and diagnosing open faults with considering adjacent lines
AU - Takahashi, Hiroshi
AU - Higami, Yoshinobu
AU - Kadoyama, Shuhei
AU - Aikyo, Takashi
AU - Takamatsu, Yuzo
AU - Yamazaki, Koji
AU - Tsutsumi, Toshiyuki
AU - Yotsuyanagi, Hiroyuki
AU - Hashizume, Masaki
PY - 2007
Y1 - 2007
N2 - Under the modern manufacturing technologies, the open defect is one of the significant issues to maintain the reliability of DSM circuits. However, the modeling and techniques for test and diagnosis for open faults have not been established yet. In this paper, we give an important clue for modeling an open fault with considering the affects of adjacent lines. Firstly, we use computer simulations to analyze the defective behaviors of a line with the open defect. From the simulation results, we propose a new open fault model that is excited depending on the logic values at the adjacent lines assigned by a test. Next, we propose a diagnosis method that uses the pass/fail information to deduce the candidate open fault. Finally, experimental results show that the proposed method is able to diagnose the open faults with good resolution. It takes about 6 minutes to diagnose the open fault on the large circuit (2M gates).
AB - Under the modern manufacturing technologies, the open defect is one of the significant issues to maintain the reliability of DSM circuits. However, the modeling and techniques for test and diagnosis for open faults have not been established yet. In this paper, we give an important clue for modeling an open fault with considering the affects of adjacent lines. Firstly, we use computer simulations to analyze the defective behaviors of a line with the open defect. From the simulation results, we propose a new open fault model that is excited depending on the logic values at the adjacent lines assigned by a test. Next, we propose a diagnosis method that uses the pass/fail information to deduce the candidate open fault. Finally, experimental results show that the proposed method is able to diagnose the open faults with good resolution. It takes about 6 minutes to diagnose the open fault on the large circuit (2M gates).
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U2 - 10.1109/ATS.2007.4387980
DO - 10.1109/ATS.2007.4387980
M3 - Conference contribution
AN - SCOPUS:48049105547
SN - 0769528902
SN - 9780769528908
T3 - Proceedings of the Asian Test Symposium
SP - 39
EP - 44
BT - Proceedings of the 16th Asian Test Symposium, ATS 2007
T2 - 16th Asian Test Symposium, ATS 2007
Y2 - 8 October 2007 through 11 October 2007
ER -