Construction of fault‐tolerant mesh‐connected highly parallel computer and its performance analysis

Itsuo Takanami*, Katsushi Inoue, Takahiro Watanabe, Minoru Oka

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review


A reconfiguration scheme is proposed in which a mesh‐connected highly parallel computer is divided into groups of PEs with small mesh‐structures, a spare row is added to each group (in what follows, such a group with a spare row is called a plane), these planes are successively connected upward and downward, and finally the top and bottom groups are connected. The scheme has such features that: (1) although switchings for reconfiguration are done locally, compensations are done globally, considering the distribution of faults over the whole planes; and (2) switching algorithm and circuits are simple and hence our scheme is suitable for dynamic reconfiguration. First, a method for repairing faults is described, and the necessary and sufficient condition for repairability is given. Next, formulas for the reliabilities of systems are given. Using these formulas, an example of computing the improvement degree of MTTF is illustrated and the result is compared with those in the literature. The probabilities of system survivals against the number of faulty PE's also are analyzed and the results are compared with those in the literature. Finally, logic circuits for the reconfiguration are shown and the correctness of their behavior is proved.

Original languageEnglish
Pages (from-to)11-24
Number of pages14
JournalSystems and Computers in Japan
Issue number8
Publication statusPublished - 1993
Externally publishedYes


  • Fault tolerance
  • dynamic reconfiguration
  • mesh‐connected
  • parallel computer
  • ring structure

ASJC Scopus subject areas

  • Theoretical Computer Science
  • Information Systems
  • Hardware and Architecture
  • Computational Theory and Mathematics


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