De-blocking filter design for HEVC and H.264/AVC

Muchen Li*, Jinjia Zhou, Dajiang Zhou, Xiao Peng, Satoshi Goto

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

16 Citations (Scopus)

Abstract

As the successor of H.264/AVC, HEVC inherits the basic property of H.264/AVC and gives some new features. This paper introduces a novel dual-standard de-blocking filter architecture which could support both of the HEVC and H.264/AVC standards. It takes 48 clock cycles for H.264/AVC and 24 cycles for HEVC for every 16×16 block. The proposed unified-cross based processing order greatly reduces the design complexity. The proposed architecture occupies 43.3k equivalent gate count at frequency of 200MHz in SMIC 65nm library, which could satisfy the throughput requirement of quad-full high definition (QFHD) on 60fps for H.264/AVC and super hi-vision (SHV) on 60fps for HEVC. In addition, the total power consumption could be reduced by 37.8% in skipping mode when the edges need not be filtered.

Original languageEnglish
Title of host publicationLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Pages273-284
Number of pages12
Volume7674 LNCS
DOIs
Publication statusPublished - 2012
Event13th Pacific-Rim Conference on Multimedia, PCM 2012 - Singapore
Duration: 2012 Dec 42012 Dec 6

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume7674 LNCS
ISSN (Print)03029743
ISSN (Electronic)16113349

Other

Other13th Pacific-Rim Conference on Multimedia, PCM 2012
CitySingapore
Period12/12/412/12/6

Keywords

  • De-blocking filter
  • dual-standard
  • H.264/AVC
  • HD
  • HEVC
  • Low Power
  • SHV

ASJC Scopus subject areas

  • Computer Science(all)
  • Theoretical Computer Science

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