Density Aware Cell Library Design for Design-Technology Co-Optimization

Shinichi Nishizawa, Toru Nakura

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper proposes a model to estimate the best layout style to maximize its power performance and area. Diffusion jogging is widely used to reduce its gate capacitance however sparse layout sometimes requires more area to improve layer density. Standard cell libraries with various layout styles were designed in commercial 65-nm process and evaluated its energy consumption and area considering its density constraint. Density aware library achieves 19% area reduction at the cost of 1.9% energy overhead.

Original languageEnglish
Title of host publicationProceedings of the 23rd International Symposium on Quality Electronic Design, ISQED 2022
PublisherIEEE Computer Society
ISBN (Electronic)9781665494663
DOIs
Publication statusPublished - 2022
Externally publishedYes
Event23rd International Symposium on Quality Electronic Design, ISQED 2022 - Santa Jose, United States
Duration: 2022 Apr 62022 Apr 7

Publication series

NameProceedings - International Symposium on Quality Electronic Design, ISQED
Volume2022-April
ISSN (Print)1948-3287
ISSN (Electronic)1948-3295

Conference

Conference23rd International Symposium on Quality Electronic Design, ISQED 2022
Country/TerritoryUnited States
CitySanta Jose
Period22/4/622/4/7

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality

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