TY - GEN
T1 - Design of irregular LDPC codes without markers for insertion/deletion channels
AU - Shibata, Ryo
AU - Hosoya, Gou
AU - Yashima, Hiroyuki
N1 - Publisher Copyright:
© 2019 IEEE.
PY - 2019/12
Y1 - 2019/12
N2 - Over the past two decades, irregular low-density parity-check (LDPC) codes have been hardly able to decode information corrupted by insertion and deletion (ID) errors without markers. Surprisingly, in this paper, we bring to light the existence of irregular LDPC codes that approach the theoretical limit of the channel with ID errors even without markers. These codes contain high fractions of low-degree check nodes that do not appear in irregular codes for other channels. This motivates us to investigate the contribution of low-degree check nodes to correcting ID errors. The investigation provides the following interesting result: degree-2 check nodes are critical to approaching the theoretical limit even without markers, codes with only degree-3, 4, or more check nodes provide moderate decoding performance, and codes with only degree-5 or more check nodes can hardly correct ID errors. Finally, we present simulation results that confirm the excellent decoding performance of the irregular codes without markers.
AB - Over the past two decades, irregular low-density parity-check (LDPC) codes have been hardly able to decode information corrupted by insertion and deletion (ID) errors without markers. Surprisingly, in this paper, we bring to light the existence of irregular LDPC codes that approach the theoretical limit of the channel with ID errors even without markers. These codes contain high fractions of low-degree check nodes that do not appear in irregular codes for other channels. This motivates us to investigate the contribution of low-degree check nodes to correcting ID errors. The investigation provides the following interesting result: degree-2 check nodes are critical to approaching the theoretical limit even without markers, codes with only degree-3, 4, or more check nodes provide moderate decoding performance, and codes with only degree-5 or more check nodes can hardly correct ID errors. Finally, we present simulation results that confirm the excellent decoding performance of the irregular codes without markers.
KW - Degree optimization
KW - Insertion/deletion error
KW - Low-density parity-check (LDPC) codes
KW - Synchronization error
UR - http://www.scopus.com/inward/record.url?scp=85081956126&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85081956126&partnerID=8YFLogxK
U2 - 10.1109/GLOBECOM38437.2019.9014209
DO - 10.1109/GLOBECOM38437.2019.9014209
M3 - Conference contribution
AN - SCOPUS:85081956126
T3 - 2019 IEEE Global Communications Conference, GLOBECOM 2019 - Proceedings
BT - 2019 IEEE Global Communications Conference, GLOBECOM 2019 - Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2019 IEEE Global Communications Conference, GLOBECOM 2019
Y2 - 9 December 2019 through 13 December 2019
ER -