Abstract
Turbo code and Low Density Parity Check (LDPC) code are both recommended as FEC code in many communication standards owing to their impressive error correcting performance. Aiming at the common architecture which can decode both of the two codes, this paper describes the method of decoding turbo codes with message passing algorithm which is conventionally used for LDPC codes. In this method, turbo codes are viewed as block codes and the sparse parity check matrices are constructed through Smith Decomposition or GBT (Generator matrix based transformation). In order to guarantee decoding performance, we propose the criterion of turbo codes with no 4-cycles, which is mathematically proved and demonstrated by the simulation results.
Original language | English |
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Title of host publication | Proceedings - 2011 IEEE 7th International Colloquium on Signal Processing and Its Applications, CSPA 2011 |
Pages | 108-111 |
Number of pages | 4 |
DOIs | |
Publication status | Published - 2011 |
Event | 2011 IEEE 7th International Colloquium on Signal Processing and Its Applications, CSPA 2011 - Penang Duration: 2011 Mar 4 → 2011 Mar 6 |
Other
Other | 2011 IEEE 7th International Colloquium on Signal Processing and Its Applications, CSPA 2011 |
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City | Penang |
Period | 11/3/4 → 11/3/6 |
Keywords
- 4-cycle
- LDPC
- message passing
- parity check matrix
- turbo code
ASJC Scopus subject areas
- Signal Processing