Enhancement of drain current in planar MOSFETs by dopant profile engineering using nonmelt laser spike annealing

Akio Shima*, Toshiyuki Mine, Kazuyoshi Torii, Atsushi Hiraiwa

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

11 Citations (Scopus)

Abstract

We investigated the effect of dopant profile engineering in planar MOSFETs, in which activation annealing was done using only nonmelt laser spike annealing (LSA). Device performance was 10% and 20% better compared to that when conventional LSA and rapid thermal annealing (RTA) are used, respectively. We achieved this by reengineering the following: 1) angle implantation in the extension of an nFET; 2) germanium preamorphization implantation in the extension of a pFET; 3) halo implantation with lower energy and smaller tilt angle; 4) deep source/ drain by two-step implantation, and 5) counter implantation adjusted to the halo conditions. Hot carrier degradation was also reduced to an RTA-comparable level by halo profile engineering. Thus, we show that a submillisecond LSA is a promising technique for the fabrication of ultrashallow junctions for the 45-nm technology node and beyond and that a dopant profile engineering taking into account the minimal diffusion length of LSA is required to bring out the best device performance.

Original languageEnglish
Pages (from-to)2953-2959
Number of pages7
JournalIEEE Transactions on Electron Devices
Volume54
Issue number11
DOIs
Publication statusPublished - 2007 Nov
Externally publishedYes

Keywords

  • CMOS integrated circuits
  • Junctions
  • Laser annealing
  • Source/drain (S/D) extensions (SDEs)
  • Strained silicon
  • Very-large-scale integration (VLSI)

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Physics and Astronomy (miscellaneous)

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