TY - GEN
T1 - Equalization technique of inner chip distortion on multi-carrier CDMA scheme
AU - Watanabe, Soichi
AU - Sato, Takuro
AU - Abe, Takeo
PY - 1999/1/1
Y1 - 1999/1/1
N2 - This paper describes an equalization scheme of an inner chip disortion which is caused by multi-path fading on a multi-carrier CDMA system. The proposed equalization scheme uses Auto-regressive Process model (AR) and prediction parameters of AR are obtained by Recursive Least Square algorithm (RLS). Simulation results of the multi-carrier CDMA system using the inner chip equalizer clarified that BER is 1.1×10-2 at 20 dB of Eb/NO under the condition of two multi-path fading environments of which delay time is 2μsec and 100 Hz of fading frequency. In the evaluation of system parameters of the multi-carrier CDMA, number of subchannels are 16, data rate is 32 kbps and spreading ratio is 16.
AB - This paper describes an equalization scheme of an inner chip disortion which is caused by multi-path fading on a multi-carrier CDMA system. The proposed equalization scheme uses Auto-regressive Process model (AR) and prediction parameters of AR are obtained by Recursive Least Square algorithm (RLS). Simulation results of the multi-carrier CDMA system using the inner chip equalizer clarified that BER is 1.1×10-2 at 20 dB of Eb/NO under the condition of two multi-path fading environments of which delay time is 2μsec and 100 Hz of fading frequency. In the evaluation of system parameters of the multi-carrier CDMA, number of subchannels are 16, data rate is 32 kbps and spreading ratio is 16.
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M3 - Conference contribution
AN - SCOPUS:0032625496
SN - 0780354354
T3 - IEEE VTS 50th Vehicular Technology Conference, VTC 1999-Fall
SP - 2418
EP - 2421
BT - IEEE VTS 50th Vehicular Technology Conference, VTC 1999-Fall
T2 - IEEE VTS 50th Vehicular Technology Conference, VTC 1999-Fall
Y2 - 19 September 1999 through 22 September 1999
ER -