ESD protection of RF circuits in standard CMOS process

K. Higashi*, A. O. Adan, M. Fukumi, N. Tanba, T. Yoshimasu, M. Hayashi

*Corresponding author for this work

Research output: Contribution to conferencePaperpeer-review

2 Citations (Scopus)

Abstract

The electro-static discharge (ESD) protection of radio frequency (RF) circuits in standard complementary metal-oxide semiconductor (CMOS) process was discussed. Results showed that the degradation of the radio frequency (RF) characteristics by ESD protection device capacitance CESD depends on the ratio of CESD and input transistor gate capacitance. The parasitic capacitance of the ESD device is reduced to ∼150 fF by using SCR(silicon controlled rectifiers)-based protection device.

Original languageEnglish
Pages285-288
Number of pages4
Publication statusPublished - 2002 Jan 1
Externally publishedYes
Event2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium - Seatle, WA, United States
Duration: 2002 Jun 22002 Jun 4

Conference

Conference2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium
Country/TerritoryUnited States
CitySeatle, WA
Period02/6/202/6/4

ASJC Scopus subject areas

  • Engineering(all)

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