FANTCAD: ATPG for the deep sub-micron era

Tsuyoshi Yamamoto*, Naoko Karasawa, Shuji Hamada, Takashi Aikyo

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review


This paper describes a new automatic test pattern generation system called FANTCAD which achieves a high fault coverage for full-scan designs. This ATPG system incorporates the latest algorithms for implication, unique path sensitization, and fault simulation. It has been extended for designs which contain bidirectional I/O, buses, scan flip-flops with asynchronous preset/clear, and embedded RAM. FANTCAD has generated test patterns for all testable faults and identified all redundant faults for 150-Kgate designs within four hours per design. This paper also gives experimental results for actual full-scan designs.

Original languageEnglish
Pages (from-to)167-172
Number of pages6
JournalFujitsu Scientific and Technical Journal
Issue number2
Publication statusPublished - 1995
Externally publishedYes

ASJC Scopus subject areas

  • Human-Computer Interaction
  • Hardware and Architecture
  • Electrical and Electronic Engineering


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