Abstract
A 6F2 single cell (one-cell-per-bit) operation of the floating body RAM (FBRAM) is successfully demonstrated for the first time with more than 60% yield of 16Mbit area in a wafer. The signal sense margin (SSM) at actual read conditions is found to well back up the functional results. The parasitic resistance in the source and drain formed under the FBC's spacers can be optimized for making the SSM as large as 8μA at ±4.5σ without sacrificing the retention time.
Original language | English |
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Article number | 4418857 |
Pages (from-to) | 39-42 |
Number of pages | 4 |
Journal | Technical Digest - International Electron Devices Meeting, IEDM |
DOIs | |
Publication status | Published - 2007 Dec 1 |
Externally published | Yes |
Event | 2007 IEEE International Electron Devices Meeting, IEDM - Washington, DC, United States Duration: 2007 Dec 10 → 2007 Dec 12 |
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Condensed Matter Physics
- Electrical and Electronic Engineering
- Materials Chemistry