Abstract
In this paper, we propose a floorplan-driven highlevel synthesis algorithm utilizing both volatile and non-volatile registers for hybrid energy-harvesting systems. In our algorithm, we firstly introduce an idea of safety line candidates. Based on them, we perform safety-line (SL) scheduling so that every operation does not cross the safety line candidates and then perform volatile/non-volatile register binding so that all the data crossing the safety line candidates are stored into non-violate registers. We can safely restore all the data and re-start the circuit operation from every safety line candidate, even if the power shut-off occurs while running the circuit. Experimental results show that our algorithm reduces average latency by 30.76% and the average energy consumption by 24.94% compared to the naive algorithm when sufficient energy is given (normal mode). Experimental results also show that our algorithm reduces average latency by 30.58% compared to the naive algorithm by reducing rollback execution if a small amount of energy is given (energy-harvesting mode).
Original language | English |
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Title of host publication | Proceedings - 2017 IEEE 12th International Conference on ASIC, ASICON 2017 |
Publisher | IEEE Computer Society |
Pages | 64-67 |
Number of pages | 4 |
Volume | 2017-October |
ISBN (Electronic) | 9781509066247 |
DOIs | |
Publication status | Published - 2018 Jan 8 |
Event | 12th IEEE International Conference on Advanced Semiconductor Integrated Circuits, ASICON 2017 - Guiyang, China Duration: 2017 Oct 25 → 2017 Oct 28 |
Other
Other | 12th IEEE International Conference on Advanced Semiconductor Integrated Circuits, ASICON 2017 |
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Country/Territory | China |
City | Guiyang |
Period | 17/10/25 → 17/10/28 |
ASJC Scopus subject areas
- Hardware and Architecture
- Electrical and Electronic Engineering