TY - GEN
T1 - FTTDOR
T2 - 9th IEEE International Symposium on Embedded Multicore/Manycore SoCs, MCSoC 2015
AU - Meyer, Michael Conrad
AU - Ahmed, Akram Ben
AU - Okuyama, Yuichi
AU - Abdallah, Abderazek Ben
N1 - Funding Information:
Acknowledgments This work is supported by VLSI Design and Education Center (VDEC), the University of Tokyo, Japan, in collaboration with Synopsis, INC. and Cadence Design Systems, Inc. It is also supported by competitive research funding, University of Aizu, Japan, Ref. P12-2013 and P5-2015.
PY - 2015/11/11
Y1 - 2015/11/11
N2 - Photonic Networks-on-Chip (PNoCs) have been proposed as a disruptive technology solution to the silicon problem showing their great superiority over their electronic counterparts. In these architectures, higher bandwidth can be achieved thanks to the light speed transmissions, and the power required to transmit over a distance is much lower. Despite these advantages, PNoC designs are very complex, and thus are more susceptible to physical defects and short-term malfunctions. Therefore, fault-tolerance has become a primordial requirement for these future generation high-performance systems. In this paper, we present a fault-tolerant optical router, named FTTDOR, with its electrical control module for highlyreliable low-power 3D-Networks-on-Chip (PHENIC). It uses minimal redundancy to assure accuracy of the packet transmission even after faulty Microring Resonators (MRs) are detected. The fault-tolerant optical switch is decomposed nonblocking, with minimal MRs, and requires no MRs for straight transmission (East to West, North to South, and Up to Down, as well as their inverses). Simulation results show that the network can maintain 98% and 94% throughput when considering 3% and 20% fault-rates, respectively. These results come with 35% decrease in the number of MRs when compared to the conventional crossbar switch resulting in 32% power reduction.
AB - Photonic Networks-on-Chip (PNoCs) have been proposed as a disruptive technology solution to the silicon problem showing their great superiority over their electronic counterparts. In these architectures, higher bandwidth can be achieved thanks to the light speed transmissions, and the power required to transmit over a distance is much lower. Despite these advantages, PNoC designs are very complex, and thus are more susceptible to physical defects and short-term malfunctions. Therefore, fault-tolerance has become a primordial requirement for these future generation high-performance systems. In this paper, we present a fault-tolerant optical router, named FTTDOR, with its electrical control module for highlyreliable low-power 3D-Networks-on-Chip (PHENIC). It uses minimal redundancy to assure accuracy of the packet transmission even after faulty Microring Resonators (MRs) are detected. The fault-tolerant optical switch is decomposed nonblocking, with minimal MRs, and requires no MRs for straight transmission (East to West, North to South, and Up to Down, as well as their inverses). Simulation results show that the network can maintain 98% and 94% throughput when considering 3% and 20% fault-rates, respectively. These results come with 35% decrease in the number of MRs when compared to the conventional crossbar switch resulting in 32% power reduction.
KW - 3D-NoCs
KW - Control Router
KW - Fault-tolerant
KW - Hybrid
KW - Optical Router/Switch
UR - http://www.scopus.com/inward/record.url?scp=84962682418&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84962682418&partnerID=8YFLogxK
U2 - 10.1109/MCSoC.2015.17
DO - 10.1109/MCSoC.2015.17
M3 - Conference contribution
AN - SCOPUS:84962682418
T3 - Proceedings - IEEE 9th International Symposium on Embedded Multicore/Manycore SoCs, MCSoC 2015
SP - 227
EP - 234
BT - Proceedings - IEEE 9th International Symposium on Embedded Multicore/Manycore SoCs, MCSoC 2015
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 23 September 2015 through 25 September 2015
ER -