Full-scale whole device EMC/MD simulation of Si nanowire transistor including source and drain regions by utilizing graphic processing units

Akito Suzuki; Takanobu Watanabe; Yoshinari Kamakura; Takefumi Kamioka

doi:10.1109/SISPAD.2014.6931637

Full-scale whole device EMC/MD simulation of Si nanowire transistor including source and drain regions by utilizing graphic processing units

Akito Suzuki^*, Takanobu Watanabe, Yoshinari Kamakura, Takefumi Kamioka

^*Corresponding author for this work

School of Fundamental Science and Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

3 Citations (Scopus)

Abstract

We have realized the full-scale whole device EMC/MD simulation including source and drain regions by utilizing graphic processing unit. The transfer characteristic of a gate-all-around nanowire Si MOSFET is simulated by reproducing the field effect of the surrounding gate electrode with spreading charged particles on the gate insulator layer. We have found an appreciable impact of the random dopant distribution (RDF) in source and drain regions on the drain current variability. Furthermore, the dynamic fluctuation of the drain current is found to be increase as the channel length decreases. The EMC/MD simulation powered by GPU is a useful method to investigate the dynamic fluctuation as well as the statistical device-to-device variability of nano-scale FETs.

Original language	English
Title of host publication	International Conference on Simulation of Semiconductor Processes and Devices, SISPAD
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	357-360
Number of pages	4
ISBN (Electronic)	9781479952885
DOIs	https://doi.org/10.1109/SISPAD.2014.6931637
Publication status	Published - 2014 Oct 20
Event	2014 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2014 - Yokohama, Japan Duration: 2014 Sept 9 → 2014 Sept 11

Publication series

Name	International Conference on Simulation of Semiconductor Processes and Devices, SISPAD

Conference

Conference	2014 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2014
Country/Territory	Japan
City	Yokohama
Period	14/9/9 → 14/9/11

Keywords

Graphic Processing Unit (GPU)
Si nanowire Transistor
ensemble Monte Carlo/molecular dynamics (EMC/MD)
random dopant fluctuation (RDF)
random telegraph noise (RTN)

ASJC Scopus subject areas

Electrical and Electronic Engineering
Computer Science Applications
Modelling and Simulation

Access to Document

10.1109/SISPAD.2014.6931637

Cite this

Suzuki, A., Watanabe, T., Kamakura, Y., & Kamioka, T. (2014). Full-scale whole device EMC/MD simulation of Si nanowire transistor including source and drain regions by utilizing graphic processing units. In International Conference on Simulation of Semiconductor Processes and Devices, SISPAD (pp. 357-360). Article 6931637 (International Conference on Simulation of Semiconductor Processes and Devices, SISPAD). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/SISPAD.2014.6931637

Full-scale whole device EMC/MD simulation of Si nanowire transistor including source and drain regions by utilizing graphic processing units. / Suzuki, Akito; Watanabe, Takanobu; Kamakura, Yoshinari et al.
International Conference on Simulation of Semiconductor Processes and Devices, SISPAD. Institute of Electrical and Electronics Engineers Inc., 2014. p. 357-360 6931637 (International Conference on Simulation of Semiconductor Processes and Devices, SISPAD).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Suzuki, A, Watanabe, T, Kamakura, Y & Kamioka, T 2014, Full-scale whole device EMC/MD simulation of Si nanowire transistor including source and drain regions by utilizing graphic processing units. in International Conference on Simulation of Semiconductor Processes and Devices, SISPAD., 6931637, International Conference on Simulation of Semiconductor Processes and Devices, SISPAD, Institute of Electrical and Electronics Engineers Inc., pp. 357-360, 2014 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2014, Yokohama, Japan, 14/9/9. https://doi.org/10.1109/SISPAD.2014.6931637

Suzuki A, Watanabe T, Kamakura Y, Kamioka T. Full-scale whole device EMC/MD simulation of Si nanowire transistor including source and drain regions by utilizing graphic processing units. In International Conference on Simulation of Semiconductor Processes and Devices, SISPAD. Institute of Electrical and Electronics Engineers Inc. 2014. p. 357-360. 6931637. (International Conference on Simulation of Semiconductor Processes and Devices, SISPAD). doi: 10.1109/SISPAD.2014.6931637

Suzuki, Akito ; Watanabe, Takanobu ; Kamakura, Yoshinari et al. / Full-scale whole device EMC/MD simulation of Si nanowire transistor including source and drain regions by utilizing graphic processing units. International Conference on Simulation of Semiconductor Processes and Devices, SISPAD. Institute of Electrical and Electronics Engineers Inc., 2014. pp. 357-360 (International Conference on Simulation of Semiconductor Processes and Devices, SISPAD).

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abstract = "We have realized the full-scale whole device EMC/MD simulation including source and drain regions by utilizing graphic processing unit. The transfer characteristic of a gate-all-around nanowire Si MOSFET is simulated by reproducing the field effect of the surrounding gate electrode with spreading charged particles on the gate insulator layer. We have found an appreciable impact of the random dopant distribution (RDF) in source and drain regions on the drain current variability. Furthermore, the dynamic fluctuation of the drain current is found to be increase as the channel length decreases. The EMC/MD simulation powered by GPU is a useful method to investigate the dynamic fluctuation as well as the statistical device-to-device variability of nano-scale FETs.",

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AU - Kamioka, Takefumi

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N2 - We have realized the full-scale whole device EMC/MD simulation including source and drain regions by utilizing graphic processing unit. The transfer characteristic of a gate-all-around nanowire Si MOSFET is simulated by reproducing the field effect of the surrounding gate electrode with spreading charged particles on the gate insulator layer. We have found an appreciable impact of the random dopant distribution (RDF) in source and drain regions on the drain current variability. Furthermore, the dynamic fluctuation of the drain current is found to be increase as the channel length decreases. The EMC/MD simulation powered by GPU is a useful method to investigate the dynamic fluctuation as well as the statistical device-to-device variability of nano-scale FETs.

AB - We have realized the full-scale whole device EMC/MD simulation including source and drain regions by utilizing graphic processing unit. The transfer characteristic of a gate-all-around nanowire Si MOSFET is simulated by reproducing the field effect of the surrounding gate electrode with spreading charged particles on the gate insulator layer. We have found an appreciable impact of the random dopant distribution (RDF) in source and drain regions on the drain current variability. Furthermore, the dynamic fluctuation of the drain current is found to be increase as the channel length decreases. The EMC/MD simulation powered by GPU is a useful method to investigate the dynamic fluctuation as well as the statistical device-to-device variability of nano-scale FETs.

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Full-scale whole device EMC/MD simulation of Si nanowire transistor including source and drain regions by utilizing graphic processing units

Abstract

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Conference

Keywords

ASJC Scopus subject areas

Access to Document

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