Gate electrode engineering by control of grain growth for high performance and high reliable 0.18 μm dual gate CMOS

S. Shimizu; T. Kuroi; H. Sayama; A. Furukawa; Y. Nishida; Y. Inoue; M. Inuishi; T. Nishimura

Gate electrode engineering by control of grain growth for high performance and high reliable 0.18 μm dual gate CMOS

S. Shimizu^*, T. Kuroi, H. Sayama, A. Furukawa, Y. Nishida, Y. Inoue, M. Inuishi, T. Nishimura

^*Corresponding author for this work

Research output: Contribution to journal › Conference article › peer-review

11 Citations (Scopus)

Abstract

Advanced gate electrode engineering is demonstrated to overcome the key issues of dual gate CMOS with thin gate oxide film. Using the small-grain-size polysilicon for the gate electrode, not only the suppression of gate depletion but also the stability of threshold voltage can be achieved as well as the improvement of the gate oxide integrity. Furthermore this successful implementation into 0.18 μm in CMOS is demonstrated with high performance and high reliability.

Original language	English
Pages (from-to)	107-108
Number of pages	2
Journal	Digest of Technical Papers - Symposium on VLSI Technology
Publication status	Published - 1997
Externally published	Yes
Event	Proceedings of the 1997 Symposium on VLSI Technology - Kyoto, Jpn Duration: 1997 Jun 10 → 1997 Jun 12

ASJC Scopus subject areas

Electrical and Electronic Engineering

Cite this

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title = "Gate electrode engineering by control of grain growth for high performance and high reliable 0.18 μm dual gate CMOS",

abstract = "Advanced gate electrode engineering is demonstrated to overcome the key issues of dual gate CMOS with thin gate oxide film. Using the small-grain-size polysilicon for the gate electrode, not only the suppression of gate depletion but also the stability of threshold voltage can be achieved as well as the improvement of the gate oxide integrity. Furthermore this successful implementation into 0.18 μm in CMOS is demonstrated with high performance and high reliability.",

author = "S. Shimizu and T. Kuroi and H. Sayama and A. Furukawa and Y. Nishida and Y. Inoue and M. Inuishi and T. Nishimura",

year = "1997",

language = "English",

pages = "107--108",

journal = "Digest of Technical Papers - Symposium on VLSI Technology",

issn = "0743-1562",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "Proceedings of the 1997 Symposium on VLSI Technology ; Conference date: 10-06-1997 Through 12-06-1997",

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TY - JOUR

T1 - Gate electrode engineering by control of grain growth for high performance and high reliable 0.18 μm dual gate CMOS

AU - Shimizu, S.

AU - Kuroi, T.

AU - Sayama, H.

AU - Furukawa, A.

AU - Nishida, Y.

AU - Inoue, Y.

AU - Inuishi, M.

AU - Nishimura, T.

PY - 1997

Y1 - 1997

N2 - Advanced gate electrode engineering is demonstrated to overcome the key issues of dual gate CMOS with thin gate oxide film. Using the small-grain-size polysilicon for the gate electrode, not only the suppression of gate depletion but also the stability of threshold voltage can be achieved as well as the improvement of the gate oxide integrity. Furthermore this successful implementation into 0.18 μm in CMOS is demonstrated with high performance and high reliability.

AB - Advanced gate electrode engineering is demonstrated to overcome the key issues of dual gate CMOS with thin gate oxide film. Using the small-grain-size polysilicon for the gate electrode, not only the suppression of gate depletion but also the stability of threshold voltage can be achieved as well as the improvement of the gate oxide integrity. Furthermore this successful implementation into 0.18 μm in CMOS is demonstrated with high performance and high reliability.

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UR - http://www.scopus.com/inward/citedby.url?scp=0030648253&partnerID=8YFLogxK

M3 - Conference article

AN - SCOPUS:0030648253

SN - 0743-1562

SP - 107

EP - 108

JO - Digest of Technical Papers - Symposium on VLSI Technology

JF - Digest of Technical Papers - Symposium on VLSI Technology

T2 - Proceedings of the 1997 Symposium on VLSI Technology

Y2 - 10 June 1997 through 12 June 1997

ER -

Gate electrode engineering by control of grain growth for high performance and high reliable 0.18 μm dual gate CMOS

Abstract

ASJC Scopus subject areas

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