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Gate electrode engineering by control of grain growth for high performance and high reliable 0.18 μm dual gate CMOS
S. Shimizu*, T. Kuroi, H. Sayama, A. Furukawa, Y. Nishida, Y. Inoue, M. Inuishi, T. Nishimura
*Corresponding author for this work
Research output: Contribution to journal › Conference article › peer-review
11
Citations
(Scopus)