Takeshi Yoshimura*

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)


An LSI compaction method which minimizes total wire length as well as layout area is discussed. First, the compaction problem is formulated as a linear programming problem and reduced to a problem involving finding a tree which has some properties in a constraint graph. Then, a method which finds the tree by a sequence of elementary tree transformations in the graph is proposed. It corresponds to the primal simplex method for LP. However, the proposed method is much more efficient, because it does not deal with any matrices in solving the problem.

Original languageEnglish
Title of host publicationProceedings - IEEE International Symposium on Circuits and Systems
Number of pages4
Publication statusPublished - 1985
Externally publishedYes

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials


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