Heterogeneous multiprocessor on a chip which enables 54x AAC-LC stereo encoding

Masaki Ito; Takashi Todaka; Takanobu Tsunoda; Hiroshi Tanaka; Tomoyuki Kodama; Hiroaki Shikano; Masafumi Onouchi; Kunio Uchiyama; Toshihiko Odaka; Tatsuya Kamei; Ei Nagahama; Manabu Kusaoke; Yusuke Nitta; Yasutaka Wada; Keiji Kimura; Hironori Kasahara

doi:10.1109/VLSIC.2007.4342719

Heterogeneous multiprocessor on a chip which enables 54x AAC-LC stereo encoding

Masaki Ito^*, Takashi Todaka, Takanobu Tsunoda, Hiroshi Tanaka, Tomoyuki Kodama, Hiroaki Shikano, Masafumi Onouchi, Kunio Uchiyama, Toshihiko Odaka, Tatsuya Kamei, Ei Nagahama, Manabu Kusaoke, Yusuke Nitta, Yasutaka Wada, Keiji Kimura, Hironori Kasahara

^*Corresponding author for this work

School of Fundamental Science and Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

7 Citations (Scopus)

Abstract

A heterogeneous multiprocessor on a chip has been designed and implemented. It consists of 2 CPUs and 2 DRPs (Dynamic Reconfigurable Processors). The design of DRP was intended to achieve high-performance in a small area to be integrated on a SoC for embedded systems. Memory architecture of CPUs and DRPs were unified to improve programming and compiling efficiency. 54x AAC-LC stereo encoding has been enabled with 2 DRPs at 300MHz and 2 CPUs at 600MHz.

Original language	English
Title of host publication	2007 Symposium on VLSI Circuits, VLSIC - Digest of Technical Papers
Pages	18-19
Number of pages	2
DOIs	https://doi.org/10.1109/VLSIC.2007.4342719
Publication status	Published - 2007 Dec 1
Event	2007 Symposium on VLSI Circuits, VLSIC - Kyoto, Japan Duration: 2007 Jun 14 → 2007 Jun 16

Publication series

Name	IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Other

Other	2007 Symposium on VLSI Circuits, VLSIC
Country/Territory	Japan
City	Kyoto
Period	07/6/14 → 07/6/16

Keywords

Dynamic reconfigurable processor
Embedded system and AAC
Multiprocessor
SoC

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

Access to Document

10.1109/VLSIC.2007.4342719

Cite this

Ito, M., Todaka, T., Tsunoda, T., Tanaka, H., Kodama, T., Shikano, H., Onouchi, M., Uchiyama, K., Odaka, T., Kamei, T., Nagahama, E., Kusaoke, M., Nitta, Y., Wada, Y., Kimura, K., & Kasahara, H. (2007). Heterogeneous multiprocessor on a chip which enables 54x AAC-LC stereo encoding. In 2007 Symposium on VLSI Circuits, VLSIC - Digest of Technical Papers (pp. 18-19). Article 4342719 (IEEE Symposium on VLSI Circuits, Digest of Technical Papers). https://doi.org/10.1109/VLSIC.2007.4342719

Heterogeneous multiprocessor on a chip which enables 54x AAC-LC stereo encoding. / Ito, Masaki; Todaka, Takashi; Tsunoda, Takanobu et al.
2007 Symposium on VLSI Circuits, VLSIC - Digest of Technical Papers. 2007. p. 18-19 4342719 (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Ito, M, Todaka, T, Tsunoda, T, Tanaka, H, Kodama, T, Shikano, H, Onouchi, M, Uchiyama, K, Odaka, T, Kamei, T, Nagahama, E, Kusaoke, M, Nitta, Y, Wada, Y, Kimura, K & Kasahara, H 2007, Heterogeneous multiprocessor on a chip which enables 54x AAC-LC stereo encoding. in 2007 Symposium on VLSI Circuits, VLSIC - Digest of Technical Papers., 4342719, IEEE Symposium on VLSI Circuits, Digest of Technical Papers, pp. 18-19, 2007 Symposium on VLSI Circuits, VLSIC, Kyoto, Japan, 07/6/14. https://doi.org/10.1109/VLSIC.2007.4342719

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Heterogeneous multiprocessor on a chip which enables 54x AAC-LC stereo encoding

Abstract

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Keywords

ASJC Scopus subject areas

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