TY - GEN
T1 - High temperature resistant packaging for SiC power devices using interconnections formed by Ni micro-electro-plating and Ni nano-particles
AU - Tanaka, Yasunori
AU - Ota, Keito
AU - Miyano, Haruka
AU - Shigenaga, Yoshiaki
AU - Iizuka, Tomonori
AU - Tatsumi, Kohei
N1 - Publisher Copyright:
© 2015 IEEE.
PY - 2015/7/15
Y1 - 2015/7/15
N2 - Ni Micro-Plating and Ni nano-particle bonding were applied for high temperature resistant chip interconnections of power device packaging. During the evaluation of the reliability of interconnections annealed at up to 300°C, we observed no significant changes in mechanical or electrical properties. Die attach connection was carried out by sintering Ni nano-particles at a low temperature below 300°C. It was also revealed in a bonding experiment using a SiC chip with a deposited Al layer that direct bonding to an Al electrode was possible by using Ni nano-particles. A stress-relaxation structure using a metal film was presented as a new structure for resolving the problem of deteriorating bonding reliability due to thermal stress arising from differences in the coefficient of thermal expansion (CTE) between the chip and the substrate. A SiC device was assembled using the new bonding methods and an operating test was performed to verify normal operation in a high-temperature environment of approximately 300°C and higher.
AB - Ni Micro-Plating and Ni nano-particle bonding were applied for high temperature resistant chip interconnections of power device packaging. During the evaluation of the reliability of interconnections annealed at up to 300°C, we observed no significant changes in mechanical or electrical properties. Die attach connection was carried out by sintering Ni nano-particles at a low temperature below 300°C. It was also revealed in a bonding experiment using a SiC chip with a deposited Al layer that direct bonding to an Al electrode was possible by using Ni nano-particles. A stress-relaxation structure using a metal film was presented as a new structure for resolving the problem of deteriorating bonding reliability due to thermal stress arising from differences in the coefficient of thermal expansion (CTE) between the chip and the substrate. A SiC device was assembled using the new bonding methods and an operating test was performed to verify normal operation in a high-temperature environment of approximately 300°C and higher.
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U2 - 10.1109/ECTC.2015.7159776
DO - 10.1109/ECTC.2015.7159776
M3 - Conference contribution
AN - SCOPUS:84942089704
T3 - Proceedings - Electronic Components and Technology Conference
SP - 1371
EP - 1376
BT - 2015 IEEE 65th Electronic Components and Technology Conference, ECTC 2015
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2015 65th IEEE Electronic Components and Technology Conference, ECTC 2015
Y2 - 26 May 2015 through 29 May 2015
ER -