High Voltage Stress Induced in Transparent Polycrystalline Diamond Field-Effect Transistor and Enhanced Endurance Using Thick Al2O3 Passivation Layer

Mohd Syamsul*, Yuya Kitabayashi, Takuya Kudo, Daisuke Matsumura, Hiroshi Kawarada

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

21 Citations (Scopus)

Abstract

A transparent polycrystalline diamond field-effect transistor (FET) was fabricated and measured in room temperature measurements, which reveals comparatively high maximum current density and high breakdown voltage of more than 1000 V. A harsh stress environment is proposed for simple and time-effective reliability stress measurement of the FET using a method of 50 continuous cycles of 500-V voltage stress. A 400-nm-thick Al2O3 counter-destructive passivation layer was implemented on the FET for the stress measurements. Devices with wide gate-drain length (LGD) retain their FET characteristics after the harsh stress measurements by only 50% reductions maximum current density.

Original languageEnglish
Article number7882717
Pages (from-to)607-610
Number of pages4
JournalIEEE Electron Device Letters
Volume38
Issue number5
DOIs
Publication statusPublished - 2017 May

Keywords

  • Degradation
  • FETs
  • diamond
  • two-dimensional hole gas
  • voltage stress

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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