HyDMA: Low-latency intercore DMA based on a hybrid packet-circuit switching network-on-chip

Zhenqi Wei, Peilin Liu, Rongdi Sun, Zunquan Zhou, Ke Jin, Dajiang Zhou

    Research output: Contribution to journalLetterpeer-review


    With a growing number of cores integrated in a single chip, the efficiency of inter-core direct memory access (DMA) transfers has an increasingly significant impact on the overall performance of parallel applications running on network-on-chip (NoC) processors. In this paper we propose HyDMA, a low-latency inter-core DMA approach based on a hybrid packetcircuit switching NoC. With dynamic setup and lengthening of circuit channels composing of bidirectional links, HyDMA can achieve both high flexibility of packet switching and low communication latency of circuit switching for concurrent DMA transfers. Experimental results prove HyDMA exhibits high efficiency with marginal hardware overhead.

    Original languageEnglish
    JournalIEICE Electronics Express
    Issue number14
    Publication statusPublished - 2016


    • Bidirectional link
    • Circuit setup
    • DMA
    • NoC
    • Packet-circuit switching

    ASJC Scopus subject areas

    • Electronic, Optical and Magnetic Materials
    • Condensed Matter Physics
    • Electrical and Electronic Engineering


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