Abstract
To achieve low-skew clock distribution, clock tree synthesis (CTS) for local clock optimization is used so far. Challenged by the increasing design complexity and performance demand, a new strategy for local clock optimization is used along with register placement for high-performance circuits. Special local clock distribution is used and registers are legalized to fit required skew. In this paper, we study the register placement problem and formulate it as a minimum weighted maximum independent set problem on a weighted conflict graph. Then, we propose a novel Lagrangian relaxation based algorithm. By relaxing the overlap conflict constraints, the problem is transformed into a minimum weighted bipartite matching problem. Experiments show that our method can efficiently place all registers without overlaps with minimized total register movement.
Original language | English |
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Title of host publication | Proceedings of the 10th International Symposium on Quality Electronic Design, ISQED 2009 |
Pages | 511-516 |
Number of pages | 6 |
DOIs | |
Publication status | Published - 2009 |
Event | 10th International Symposium on Quality Electronic Design, ISQED 2009 - San Jose, CA Duration: 2009 Mar 16 → 2009 Mar 18 |
Other
Other | 10th International Symposium on Quality Electronic Design, ISQED 2009 |
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City | San Jose, CA |
Period | 09/3/16 → 09/3/18 |
Keywords
- Clock skew
- High-performance
- Register
ASJC Scopus subject areas
- Hardware and Architecture
- Electrical and Electronic Engineering