Linearity and low-noise performance of SOI MOSFETs for RF applications

Alberto O. Adan; Toshihiko Yoshimasu; Shoichi Shitara; Noriyuki Tanba; Masayuki Fukumi

doi:10.1109/16.998598

Linearity and low-noise performance of SOI MOSFETs for RF applications

Alberto O. Adan^*, Toshihiko Yoshimasu, Shoichi Shitara, Noriyuki Tanba, Masayuki Fukumi

^*Corresponding author for this work

Research output: Contribution to journal › Article › peer-review

82 Citations (Scopus)

Abstract

The MOSFET parameters important for RF application at GHz frequencies: a) transition frequency, b) noise figure, and c) linearity are analyzed and correlated with substrate type. This work demonstrates that, without process changes, high-resistivity silicon-on-insulator (high-ρ SOI) substrates can successfully enhance the RF performance of on-chip inductors and fully depleted (FD)-SOI devices in terms of reducing substrate losses and parasitics. The linearity limitations of the SOI low-breakdown voltage and "kink" effect are addressed by judicious device and circuit design. Criteria for device optimization are derived. A N F = 1.7 dB at 2.5 GHz for a 0.25 μm FD-SOI low-noise amplifier (LNA) on high-ρ SOI substrate obtained the lowest noise figure for applications in the L and S-bands.

Original language	English
Pages (from-to)	881-888
Number of pages	8
Journal	IEEE Transactions on Electron Devices
Volume	49
Issue number	5
DOIs	https://doi.org/10.1109/16.998598
Publication status	Published - 2002 May
Externally published	Yes

Keywords

CMOS
LNA
Linearity
MOSFET
Noise
RF
SOI

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

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10.1109/16.998598

Cite this

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title = "Linearity and low-noise performance of SOI MOSFETs for RF applications",

abstract = "The MOSFET parameters important for RF application at GHz frequencies: a) transition frequency, b) noise figure, and c) linearity are analyzed and correlated with substrate type. This work demonstrates that, without process changes, high-resistivity silicon-on-insulator (high-ρ SOI) substrates can successfully enhance the RF performance of on-chip inductors and fully depleted (FD)-SOI devices in terms of reducing substrate losses and parasitics. The linearity limitations of the SOI low-breakdown voltage and {"}kink{"} effect are addressed by judicious device and circuit design. Criteria for device optimization are derived. A N F = 1.7 dB at 2.5 GHz for a 0.25 μm FD-SOI low-noise amplifier (LNA) on high-ρ SOI substrate obtained the lowest noise figure for applications in the L and S-bands.",

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AU - Adan, Alberto O.

AU - Yoshimasu, Toshihiko

AU - Shitara, Shoichi

AU - Tanba, Noriyuki

AU - Fukumi, Masayuki

PY - 2002/5

Y1 - 2002/5

N2 - The MOSFET parameters important for RF application at GHz frequencies: a) transition frequency, b) noise figure, and c) linearity are analyzed and correlated with substrate type. This work demonstrates that, without process changes, high-resistivity silicon-on-insulator (high-ρ SOI) substrates can successfully enhance the RF performance of on-chip inductors and fully depleted (FD)-SOI devices in terms of reducing substrate losses and parasitics. The linearity limitations of the SOI low-breakdown voltage and "kink" effect are addressed by judicious device and circuit design. Criteria for device optimization are derived. A N F = 1.7 dB at 2.5 GHz for a 0.25 μm FD-SOI low-noise amplifier (LNA) on high-ρ SOI substrate obtained the lowest noise figure for applications in the L and S-bands.

AB - The MOSFET parameters important for RF application at GHz frequencies: a) transition frequency, b) noise figure, and c) linearity are analyzed and correlated with substrate type. This work demonstrates that, without process changes, high-resistivity silicon-on-insulator (high-ρ SOI) substrates can successfully enhance the RF performance of on-chip inductors and fully depleted (FD)-SOI devices in terms of reducing substrate losses and parasitics. The linearity limitations of the SOI low-breakdown voltage and "kink" effect are addressed by judicious device and circuit design. Criteria for device optimization are derived. A N F = 1.7 dB at 2.5 GHz for a 0.25 μm FD-SOI low-noise amplifier (LNA) on high-ρ SOI substrate obtained the lowest noise figure for applications in the L and S-bands.

KW - CMOS

KW - LNA

KW - Linearity

KW - MOSFET

KW - Noise

KW - RF

KW - SOI

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Linearity and low-noise performance of SOI MOSFETs for RF applications

Abstract

Keywords

ASJC Scopus subject areas

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