Low temperature grown carbon nanotube interconnects using inner shells by chemical mechanical polishing

Daisuke Yokoyama; Takayuki Iwasaki; Tsuyoshi Yoshida; Hiroshi Kawarada; Shintaro Sato; Takashi Hyakushima; Mizuhisa Nihei; Yuji Awano

doi:10.1063/1.2824390

Low temperature grown carbon nanotube interconnects using inner shells by chemical mechanical polishing

Daisuke Yokoyama^*, Takayuki Iwasaki, Tsuyoshi Yoshida, Hiroshi Kawarada, Shintaro Sato, Takashi Hyakushima, Mizuhisa Nihei, Yuji Awano

^*Corresponding author for this work

School of Fundamental Science and Engineering

Research output: Contribution to journal › Article › peer-review

105 Citations (Scopus)

Abstract

Vertically aligned multiwalled carbon nanotubes (MWCNTs) were synthesized by remote plasma chemical vapor deposition at a low temperature of 390 °C, which meets the requirement of the large scale integration (LSI) process. For wiring application, we measured the electrical properties of MWCNT-via structures with and without chemical mechanical polishing (CMP). The via resistances were reduced using inner shells of MWCNTs whose caps were opened due to CMP. The improved resistance after annealing at 400 °C was 0.6 for 2 μm vias. Our process is suitable for LSI because the temperature never exceeds the allowable temperature of 400 °C in the Si LSI process.

Original language	English
Article number	263101
Journal	Applied Physics Letters
Volume	91
Issue number	26
DOIs	https://doi.org/10.1063/1.2824390
Publication status	Published - 2007

ASJC Scopus subject areas

Physics and Astronomy (miscellaneous)

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title = "Low temperature grown carbon nanotube interconnects using inner shells by chemical mechanical polishing",

abstract = "Vertically aligned multiwalled carbon nanotubes (MWCNTs) were synthesized by remote plasma chemical vapor deposition at a low temperature of 390 °C, which meets the requirement of the large scale integration (LSI) process. For wiring application, we measured the electrical properties of MWCNT-via structures with and without chemical mechanical polishing (CMP). The via resistances were reduced using inner shells of MWCNTs whose caps were opened due to CMP. The improved resistance after annealing at 400 °C was 0.6 for 2 μm vias. Our process is suitable for LSI because the temperature never exceeds the allowable temperature of 400 °C in the Si LSI process.",

author = "Daisuke Yokoyama and Takayuki Iwasaki and Tsuyoshi Yoshida and Hiroshi Kawarada and Shintaro Sato and Takashi Hyakushima and Mizuhisa Nihei and Yuji Awano",

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journal = "Applied Physics Letters",

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T1 - Low temperature grown carbon nanotube interconnects using inner shells by chemical mechanical polishing

AU - Yokoyama, Daisuke

AU - Iwasaki, Takayuki

AU - Yoshida, Tsuyoshi

AU - Kawarada, Hiroshi

AU - Sato, Shintaro

AU - Hyakushima, Takashi

AU - Nihei, Mizuhisa

AU - Awano, Yuji

N1 - Funding Information: This work was completed as part of the MIRAI Project supported by NEDO.

PY - 2007

Y1 - 2007

N2 - Vertically aligned multiwalled carbon nanotubes (MWCNTs) were synthesized by remote plasma chemical vapor deposition at a low temperature of 390 °C, which meets the requirement of the large scale integration (LSI) process. For wiring application, we measured the electrical properties of MWCNT-via structures with and without chemical mechanical polishing (CMP). The via resistances were reduced using inner shells of MWCNTs whose caps were opened due to CMP. The improved resistance after annealing at 400 °C was 0.6 for 2 μm vias. Our process is suitable for LSI because the temperature never exceeds the allowable temperature of 400 °C in the Si LSI process.

AB - Vertically aligned multiwalled carbon nanotubes (MWCNTs) were synthesized by remote plasma chemical vapor deposition at a low temperature of 390 °C, which meets the requirement of the large scale integration (LSI) process. For wiring application, we measured the electrical properties of MWCNT-via structures with and without chemical mechanical polishing (CMP). The via resistances were reduced using inner shells of MWCNTs whose caps were opened due to CMP. The improved resistance after annealing at 400 °C was 0.6 for 2 μm vias. Our process is suitable for LSI because the temperature never exceeds the allowable temperature of 400 °C in the Si LSI process.

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Low temperature grown carbon nanotube interconnects using inner shells by chemical mechanical polishing

Abstract

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