Maximizing transducer gain per power dissipation in 100 GHz CMOS six-stage amplifier

Masafumi Suizu; Kosuke Katayama; Mizuki Motoyoshi; Kyoya Takano; Minoru Fujishima

doi:10.1109/IMFEDK.2012.6218631

Maximizing transducer gain per power dissipation in 100 GHz CMOS six-stage amplifier

Masafumi Suizu^*, Kosuke Katayama, Mizuki Motoyoshi, Kyoya Takano, Minoru Fujishima

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

In this paper we propose a method of maximizing the efficiency, defined as transducer gain G _T per power dissipation P _DC, of a CMOS 100 GHz six-stage amplifier using bias point tuning. Using this method, the optimal bias voltage was 0.75V and the efficiency was 30dB/W higher than that for a voltage of 0.9V.

Original language	English
Title of host publication	IMFEDK 2012 - 2012 International Meeting for Future of Electron Devices, Kansai
Pages	160-161
Number of pages	2
DOIs	https://doi.org/10.1109/IMFEDK.2012.6218631
Publication status	Published - 2012 Jul 30
Externally published	Yes
Event	10th International Meeting for Future of Electron Devices, Kansai, IMFEDK 2012 - Osaka, Japan Duration: 2012 May 9 → 2012 May 11

Publication series

Name	IMFEDK 2012 - 2012 International Meeting for Future of Electron Devices, Kansai

Other

Other	10th International Meeting for Future of Electron Devices, Kansai, IMFEDK 2012
Country/Territory	Japan
City	Osaka
Period	12/5/9 → 12/5/11

Keywords

Millimeter wave
Power amplifier
Power dissipation
Transceiver
Transducer gain

ASJC Scopus subject areas

Electrical and Electronic Engineering

Access to Document

10.1109/IMFEDK.2012.6218631

Cite this

Suizu, M., Katayama, K., Motoyoshi, M., Takano, K., & Fujishima, M. (2012). Maximizing transducer gain per power dissipation in 100 GHz CMOS six-stage amplifier. In IMFEDK 2012 - 2012 International Meeting for Future of Electron Devices, Kansai (pp. 160-161). Article 6218631 (IMFEDK 2012 - 2012 International Meeting for Future of Electron Devices, Kansai). https://doi.org/10.1109/IMFEDK.2012.6218631

Maximizing transducer gain per power dissipation in 100 GHz CMOS six-stage amplifier. / Suizu, Masafumi; Katayama, Kosuke; Motoyoshi, Mizuki et al.
IMFEDK 2012 - 2012 International Meeting for Future of Electron Devices, Kansai. 2012. p. 160-161 6218631 (IMFEDK 2012 - 2012 International Meeting for Future of Electron Devices, Kansai).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Suizu, M, Katayama, K, Motoyoshi, M, Takano, K & Fujishima, M 2012, Maximizing transducer gain per power dissipation in 100 GHz CMOS six-stage amplifier. in IMFEDK 2012 - 2012 International Meeting for Future of Electron Devices, Kansai., 6218631, IMFEDK 2012 - 2012 International Meeting for Future of Electron Devices, Kansai, pp. 160-161, 10th International Meeting for Future of Electron Devices, Kansai, IMFEDK 2012, Osaka, Japan, 12/5/9. https://doi.org/10.1109/IMFEDK.2012.6218631

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title = "Maximizing transducer gain per power dissipation in 100 GHz CMOS six-stage amplifier",

abstract = "In this paper we propose a method of maximizing the efficiency, defined as transducer gain G T per power dissipation P DC, of a CMOS 100 GHz six-stage amplifier using bias point tuning. Using this method, the optimal bias voltage was 0.75V and the efficiency was 30dB/W higher than that for a voltage of 0.9V.",

keywords = "Millimeter wave, Power amplifier, Power dissipation, Transceiver, Transducer gain",

author = "Masafumi Suizu and Kosuke Katayama and Mizuki Motoyoshi and Kyoya Takano and Minoru Fujishima",

year = "2012",

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day = "30",

doi = "10.1109/IMFEDK.2012.6218631",

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AU - Fujishima, Minoru

PY - 2012/7/30

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KW - Transceiver

KW - Transducer gain

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Maximizing transducer gain per power dissipation in 100 GHz CMOS six-stage amplifier

Abstract

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Keywords

ASJC Scopus subject areas

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